Display device comprising first and second pulse output circuits
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorHiroyuki Miyake
Life of this patent
Estimating the term…
Abstract
A scan line to which a selection signal or a non-selection signal is input from its end, and a transistor in which a clock signal is input to a gate, the non-selection signal is input to a source, and a drain is connected to the scan line are provided. A signal input to the end of the scan line is switched from the selection signal to the non-selection signal at the same or substantially the same time as the transistor is turned on. The non-selection signal is input not only from one end but also from both ends of the scan line. This makes it possible to inhibit the potentials of portions in the scan line from being changed at different times.
Claims9
A display device comprising:
- a plurality of scan lines comprising at least a first scan line and a second scan line positioned next to the first scan line;
- a first pulse output circuit electrically connected to one end of the first scan line;
- a second pulse output circuit electrically connected to one end of the second scan line;
- a pixel portion positioned between the first pulse output circuit and the second pulse output circuit in a planar view;
- and
- a first transistor and a second transistor,
- wherein one of a source and a drain of the first transistor is directly connected to the other end of the first scan line,
- wherein one of a source and a drain of the second transistor is directly connected to the other end of the second scan line,
- wherein the other of the source and the drain of the first transistor and the other of the source and the drain of the second transistor are each configured to be supplied with a power supply potential,
- wherein the other end of the first scan line is not directly connected to any transistor other than the first transistor outside the pixel portion, and
- wherein the other end of the second scan line is not directly connected to any transistor other than the second transistor outside the pixel portion.
A display device comprising:
- a plurality of scan lines comprising at least a first scan line and a second scan line positioned next to the first scan line;
- a first pulse output circuit electrically connected to one end of the first scan line;
- a second pulse output circuit electrically connected to one end of the second scan line;
- a pixel portion positioned between the first pulse output circuit and the second pulse output circuit in a planar view;
- and
- a first transistor and a second transistor,
- wherein one of a source and a drain of the first transistor is directly connected to the other end of the first scan line,
- wherein one of a source and a drain of the second transistor is directly connected to the other end of the second scan line,
- wherein the other of the source and the drain of the first transistor and the other of the source and the drain of the second transistor are each configured to be supplied with a power supply potential,
- wherein a gate of the first transistor is electrically connected to a first signal line different from the plurality of scan lines,
- wherein a gate of the second transistor is electrically connected to a second signal line different from the plurality of scan lines,
- wherein the other end of the first scan line is not directly connected to any transistor other than the first transistor outside the pixel portion, and
- wherein the other end of the second scan line is not directly connected to any transistor other than the second transistor outside the pixel portion.
Dependencies are inferred from the claim text.