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US 12,614,531 B1Granted
Display device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsKenichi Wakimoto, Masahiko Hayakawa
Life of this patent
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Abstract
To reduce power consumption of a display device with the use of a simple structure and a simple operation. The display device includes an input device. Input of an image signal to a driver circuit is controlled in accordance with an image operation signal output from the input device. Specifically, input of image signals at the time when the input device is not operated is less frequent than that at the time when the input device is operated. Accordingly, display degradation (deterioration of display quality) caused when the display device is used can be prevented and power consumed when the display device is not used can be reduced.
Claims8
A display device comprising:
- a first conductive film configured to be a gate electrode of a transistor;
- a first insulating layer having a region located over the first conductive film;
- an oxide semiconductor layer overlapping the first conductive film with the first insulating layer therebetween, the oxide semiconductor layer comprising a channel formation region of the transistor;
- a second conductive film having a region located over the oxide semiconductor layer, the second conductive film electrically connected to the oxide semiconductor layer;
- a third conductive film having a region located over the oxide semiconductor layer, the third conductive film electrically connected to the oxide semiconductor layer;
- a second insulating layer having a first region located over the second conductive film and a second region located over the third conductive film;
- and
- a third insulating layer having a region located over the second insulating layer, the third insulating layer comprising silicon nitride,
- wherein the oxide semiconductor layer comprises a first oxide semiconductor layer and a second oxide semiconductor layer over the first oxide semiconductor layer,
- wherein the first oxide semiconductor layer comprises indium, gallium, and zinc,
- wherein in the first oxide semiconductor layer, a sum of a composition ratio of indium and a composition ratio of gallium is equal to or greater than a composition ratio of zinc,
- wherein the first oxide semiconductor layer has a first crystalline region,
- wherein the second oxide semiconductor layer has a second crystalline region,
- wherein the second crystalline region has c-axis alignment,
- wherein the first insulating layer comprises a first layer comprising silicon nitride and a second layer comprising silicon oxide over the first layer,
- wherein the second layer has a region in contact with a bottom surface of the first oxide semiconductor layer, and
- wherein the second insulating layer comprises silicon oxide and has a region in contact with a top surface of the second oxide semiconductor layer.
14 more elements
A display device comprising:
- a first conductive film configured to be a gate electrode of a transistor;
- a first insulating layer having a region located over the first conductive film;
- an oxide semiconductor layer overlapping the first conductive film with the first insulating layer therebetween, the oxide semiconductor layer comprising a channel formation region of the transistor;
- a second conductive film having a region located over the oxide semiconductor layer, the second conductive film electrically connected to the oxide semiconductor layer;
- a third conductive film having a region located over the oxide semiconductor layer, the third conductive film electrically connected to the oxide semiconductor layer;
- a second insulating layer having a first region located over the second conductive film and a second region located over the third conductive film;
- and
- a third insulating layer having a region located over the second insulating layer, the third insulating layer comprising silicon nitride,
- wherein the oxide semiconductor layer comprises a first oxide semiconductor layer and a second oxide semiconductor layer over the first oxide semiconductor layer,
- wherein each of the first oxide semiconductor layer and the second oxide semiconductor layer comprises indium, gallium, and zinc,
- wherein the second oxide semiconductor layer is thicker than the first oxide semiconductor layer,
- wherein the first oxide semiconductor layer has a first crystalline region,
- wherein the second oxide semiconductor layer has a second crystalline region,
- wherein the second crystalline region has c-axis alignment,
- wherein the first insulating layer comprises a first layer comprising silicon nitride and a second layer comprising silicon oxide over the first layer,
- wherein the second layer has a region in contact with a bottom surface of the first oxide semiconductor layer, and
- wherein the second insulating layer comprises silicon oxide and has a region in contact with a top surface of the second oxide semiconductor layer.
14 more elements
A display device comprising:
- a first conductive film configured to be a gate electrode of a transistor;
- a first insulating layer having a region located over the first conductive film;
- an oxide semiconductor layer overlapping the first conductive film with the first insulating layer therebetween, the oxide semiconductor layer comprising a channel formation region of the transistor;
- a second conductive film having a region located over the oxide semiconductor layer, the second conductive film electrically connected to the oxide semiconductor layer;
- a third conductive film having a region located over the oxide semiconductor layer, the third conductive film electrically connected to the oxide semiconductor layer;
- a second insulating layer having a first region located over the second conductive film and a second region located over the third conductive film;
- and
- a third insulating layer having a region located over the second insulating layer, the third insulating layer comprising silicon nitride,
- wherein the oxide semiconductor layer comprises a first oxide semiconductor layer and a second oxide semiconductor layer over the first oxide semiconductor layer,
- wherein each of the first oxide semiconductor layer and the second oxide semiconductor layer comprises indium,
- wherein the second oxide semiconductor layer is thicker than the first oxide semiconductor layer,
- wherein the first oxide semiconductor layer has a first crystalline region,
- wherein the second oxide semiconductor layer has a second crystalline region,
- wherein the second crystalline region has c-axis alignment,
- wherein the first insulating layer comprises a first layer comprising silicon nitride and a second layer comprising silicon oxide over the first layer,
- wherein the second layer has a region in contact with a bottom surface of the first oxide semiconductor layer, and
- wherein the second insulating layer comprises silicon oxide and has a region in contact with a top surface of the second oxide semiconductor layer.
14 more elements
Dependencies are inferred from the claim text.