Gate driving circuit and display panel
AssigneeWuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
InventorHuanxi Zhang
Life of this patent
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Abstract
The present disclosure provides a gate driving circuit and a display panel. by the control of one of the fourth node, the output end of the second output module, and the first node of the shift register of the next stage, the voltage regulating module may utilize a low voltage signal to stabilize or reduce the gate voltage of the second transistor, so that the second transistor is stable or preferably in the cut-off state to reduce the leakage current. In this way, voltage level of the second gate driving signal can be maintained at a high voltage level or a pulse amplitude.
Claims20
A gate driving circuit, comprising a plurality of shift registers, wherein at least one of the plurality of shift registers comprises:
- a cascade signal selection module configured to select signals between a first wiring and a first node;
- a pull-up control module responsive to a clock signal for adjusting voltage levels between the first node and a second node;
- a filtering module connected between the second node and a third node, wherein a control end of the filtering module receives a reset or filter control signal;
- an inverting module for inverting voltage levels between the second node and a fourth node;
- a first output module configured to generate gate driving signals based on voltage levels at the third node and the fourth node;
- a second output module comprising a first transistor and a second transistor, configured to output a second gate driving signal;
- and
- a voltage regulating module connected to the second output module, configured to regulate a voltage level of the second transistor based on signals from internal nodes or the shift register of a next stage.
A display panel, comprising:
- a pixel circuit, comprising:
- a writing transistor, configured to control an input of a data signal;
- and
- a compensation transistor, configured to control the data signal to be inputted to a gate of driving transistor;
- and
- a gate driving circuit comprising a plurality of shift registers, wherein at least one of the plurality of shift registers comprises:
- a cascade signal selection module configured to select signals between a first wiring and a first node;
- a pull-up control module responsive to a clock signal for adjusting voltage levels between the first node and a second node;
- a filtering module connected between the second node and a third node, wherein a control end of the filtering module receives a reset or filter control signal;
- an inverting module for inverting voltage levels between the second node and a fourth node;
- a first output module configured to generate gate driving signals based on voltage levels at the third node and the fourth node;
- a second output module comprising a first transistor and a second transistor, configured to output a second gate driving signal;
- and
- a voltage regulating module connected to the second output module, configured to regulate a voltage level of the second transistor based on signals from internal nodes or the shift register of a next stage.
Dependencies are inferred from the claim text.