US 12,614,258 B2 · Image processing circuit and method having output timing adjustment mechanism

Abstract

The present disclosure discloses an image processing circuit having output timing adjustment mechanism. An image enhancement circuit performs image enhancement on an input image to generate an enhanced image. A first image processing path and a second image processing path respectively perform processing on the enhanced image having a first timing and the enhanced image having a second timing to generate a first output image and a second output image. A timing control circuit adjusts the timing of the enhanced image according to requirements of the first image processing path and the second image processing path to generate the enhanced image having the first timing and the enhanced image having the second timing. A first image output interface outputs the first output image. A second image output interface outputs the second output image.

Claims18

Dependent claims

An image processing circuit having output timing adjustment mechanism, comprising:

an image input interface configured to receive an input image;
an image enhancement circuit configured to perform image enhancement on the input image to generate an enhanced image;
a first image processing path configured to perform processing on a first timing enhanced image having a first timing to generate a first output image;
a second image processing path configured to perform processing on a second timing enhanced image having a second timing to generate a second output image;
a timing control circuit configured to adjust an original timing of the enhanced image according to a processing requirement of each of the first image processing path and the second image processing path to generate the first timing enhanced image having the first timing and the second timing enhanced image having the second timing;
a first image output interface configured to output the first output image;
and
a second image output interface configured to output the second output image.

5 more elements

An image processing method having output timing adjustment mechanism used in an image processing circuit, comprising:

receiving an input image by an image input interface;
performing image enhancement on the input image to generate an enhanced image by an image enhancement circuit;
adjusting an original timing of the enhanced image by a timing control circuit according to a processing requirement of a first image processing path and a second image processing path to generate a first timing enhanced image having a first timing and a second timing enhanced image having a second timing;
performing processing on the first timing enhanced image having the first timing to generate a first output image by a first image processing path;
performing processing on the second timing enhanced image having the second timing to generate a second output image by a second image processing path;
outputting the first output image by a first image output interface;
and
outputting the second output image by a second image output interface.

5 more elements

Dependencies are inferred from the claim text.

Image processing circuit and method having output timing adjustment mechanism

Life of this patent

Image processing circuit and method having output timing adjustment mechanism

Life of this patent

Abstract

Claims18