Framework for optimization of machine learning architectures

At least one memory comprising instructions to cause at least one processor circuit to at least:

• obtain a set of candidate sub-networks from a machine learning super-network;
• determine, based on a multi-objective function, a model accuracy metric and a hardware performance metric for at least one of the candidate sub-networks, the hardware performance metric based on a target hardware platform specified by configuration data, wherein the hardware performance metric is determined based on a measured hardware performance metric for the target hardware platform and a hardware performance model prediction of hardware performance of the candidate sub-network on the target hardware platform to provide a performance prediction without direct execution of the candidate sub-network on the target hardware platform;
• determine a Pareto front based on the model accuracy metric and the hardware performance metric;
• and
• output a machine learning model architecture associated with the Pareto front.

A system comprising:

• memory;
• network interface circuitry;
• instructions;
• and
• at least one processor circuit to be programmed based on the instructions to:
• obtain, via the network interface circuitry, information representative of a machine learning super-network, and cause the information to be stored in the memory;
• obtain a set of candidate sub-networks from the machine learning super-network;
• determine, based on a multi-objective function, a model accuracy metric and a hardware performance metric for at least one of the candidate sub-networks, the hardware performance metric based on a target hardware platform specified by configuration data, wherein the hardware performance metric is determined based on a measured hardware performance metric for the target hardware platform and a hardware performance model prediction of hardware performance of the candidate sub-network on the target hardware platform to provide a performance prediction without direct execution of the candidate sub-network on the target hardware platform;
• determine a Pareto front based on the model accuracy metric and the hardware performance metric;
• and
• output a machine learning model architecture associated with the Pareto front.