Data processing apparatus and method
AssigneeHuawei Technologies Co., Ltd.
InventorsZhufeng Tan, Zongyan Li
Life of this patent
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Abstract
A data processing apparatus includes a first chip and a second chip that are stacked-packaged. The first chip includes a general-purpose processor, a bus, and at least one first dedicated processing unit (DPU). The general-purpose processor and the at least one first dedicated processing unit are connected to the bus. The general-purpose processor is configured to generate a data processing task. The second chip includes a second dedicated processing unit. At least one of one or more units in the at least one first dedicated processing unit and the second dedicated processing unit can process at least a part of the data processing task based on a computing function.
Claims19
A data processing apparatus, comprising a first chip and a second chip that are stacked-packaged, wherein
- the first chip comprises a general-purpose processor, a bus, and at least one first dedicated processing unit, the general-purpose processor and the at least one first dedicated processing unit are connected to the bus, and the general-purpose processor is configured to generate a data processing task;
- and
- the second chip comprises a second dedicated processing unit, the second dedicated processing unit and one or more first dedicated processing units in the at least one first dedicated processing unit are configured with an at least partially same computing function, and at least one of the one or more first dedicated processing units and the second dedicated processing unit can process at least a part of the data processing task based on the partially same computing function, wherein
- the first chip and the second chip are connected to each other through an inter-chip interconnection and share computing power by using arithmetic logic, arithmetic manners, or arithmetic objectives that are partially same;
- wherein the general-purpose processor is configured to send start information and data related to the data processing task to the second dedicated processing unit through the inter-chip interconnection, and wherein the second dedicated processing unit is configured to switch from a standby state to a working state in response to the start information.
A data processing method, comprising:
- generating a data processing task by using a general-purpose processor in a first chip, wherein the first chip comprises the general-purpose processor, a bus, and at least one first dedicated processing unit (DPU), and the general-purpose processor and the at least one first dedicated processing unit are connected to the bus;
- processing at least a part of the data processing task by using at least one of one or more first dedicated processing units in the at least one first dedicated processing unit or a second dedicated processing unit in a second chip package, wherein the second dedicated processing unit and the one or more first dedicated processing units in the at least one first dedicated processing unit are configured with an at least partially same computing function, and the first chip and the second chip are stacked-packaged, are connected to each other through an inter-chip interconnection, and share computing power by using arithmetic logic, arithmetic manners, or arithmetic objectives that are partially same;
- and
- sending start information and data related to the data processing task to the second dedicated processing unit through the inter-chip interconnection when computing power of the one or more first dedicated processing units does not meet a requirement;
- and
- switching the second dedicated processing unit from a standby state to a working state.
Dependencies are inferred from the claim text.