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US 12,613,818 B2Granted
Hardware integrated quality of service (HiQoS)
AssigneeNXP USA, Inc.
InventorsGareth Owen Shelley, Maciej Krawczyk, Paul Michael Burns
Life of this patent
Estimating the term…
Abstract
Systems and methods for hardware integrated Quality of Service (HiQoS) are discussed. In some embodiments, an electronic device may include a chassis; and a Systems-on-Chip (SoC) disposed within the chassis, wherein the SoC comprises an extended Resource Domain Controller (XRDC) configured to block a transaction originated from a selected one of a plurality of software-defined processing domains before the transaction reaches a bus.
Claims20
An electronic device, comprising:
- a chassis;
- and
- a Systems-on-Chip (SoC) disposed within the chassis, wherein the SoC comprises an extended Resource Domain Controller (XRDC) configured to block a transaction originated from a selected one of a plurality of software-defined processing domains before the transaction reaches a bus.
A System-on-Chip (SoC), comprising:
- a bus master;
- and
- a Master Domain Processing Controller (MDAC) coupled to the bus master and to a switch fabric or crossbar, wherein the MDAC is configured to block a transaction originated from a selected one or more of a plurality of software-defined processing domains from reaching the switch fabric or crossbar, at least in part, in response to a number of transactions originated from the selected one or more software-defined processing domains having reached or surpassed a threshold value.
A method comprising:
- counting, via one or more registers, a number of transactions issued by each of a plurality of software-defined processing domains targeting a Memory Region Controller (MRC) or Peripheral Domain Access Controller (PDAC);
- generating an interrupt in response to a number of transactions issued by a given one of the plurality of software-defined processing domains meeting a threshold number of transactions associated with the given software-defined domain;
- and
- in response to the interrupt, blocking, via a Master Domain Processing Controller (MDAC), a subsequent transaction issued by the given software-defined processing domain.
1 more element
Dependencies are inferred from the claim text.