Parking threads in barrel processor for managing hazard clearing
AssigneeMicron Technology, Inc.
InventorChristopher Baronne
Life of this patent
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Abstract
Devices and techniques for parking threads in a barrel processor for managing hazard clearing are described herein. A barrel processor includes hazard management circuitry that is used to receive an indication of an instruction executing in a compute pipeline of the barrel processor, the instruction having encountered a hazard and unable to progress through the compute pipeline; store the indication of the instruction in a hazard memory; receive a signal indicating that the hazard has cleared; and cause the instruction to be rescheduled at the beginning of the compute pipeline in response to the signal.
Claims20
A barrel processor, comprising:
- hazard management circuitry;
- wherein the barrel processor is configured to perform operations through use of the hazard management circuitry to:
- store a state of an instruction in a hazard memory, in response to the instruction being unable to progress through a compute pipeline of the barrel processor due to encountering a hazard;
- and
- cause the instruction to be rescheduled at the beginning of the compute pipeline in response to an indication that the hazard has cleared.
A method comprising:
- storing a state of an instruction in a hazard memory, in response to the instruction being unable to progress through a compute pipeline of a barrel processor due to a hazard;
- and
- causing the instruction to be rescheduled at the beginning of the compute pipeline in response to an indication that the hazard has cleared.
Dependencies are inferred from the claim text.