Register allocation optimization using per-register bin packing
AssigneeMellanox Technologies, Ltd.
InventorsAlan Lo, Krishna Garlapati, Stephen Warren, Emre Orbay, Alexander Efimov
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AssigneeMellanox Technologies, Ltd.
InventorsAlan Lo, Krishna Garlapati, Stephen Warren, Emre Orbay, Alexander Efimov
Estimating the term…
Systems and methods to perform per-register bin packing are disclosed. A system may include a memory and one or more processors coupled to the memory. The one or more processors may determine a first live range of a first variable in a source code and a second live range of a second variable in the source code. The first live range and the second live range may overlap in time during execution of an output code. The one or more processors may generate the output code including a first instruction for the first variable and a second instruction for the second variable. The first instruction may include a first register identifier, a first mask, and a first offset. The second instruction may include the first register identifier, a second mask, and a second offset.
A system comprising:
A method comprising:
A network device comprising:
Dependencies are inferred from the claim text.