Memory system, electronic apparatus and operating method thereof, host system, and storage medium
AssigneeYangtze Memory Technologies Co., Ltd.
InventorMo Cheng
Life of this patent
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Abstract
Examples of the present disclosure provide a memory system, electronic apparatus and operating method thereof, host system, and storage medium; wherein the memory system includes: a memory device including a first memory area and a second memory area, the first memory area includes a plurality of first memory cells employing a single-level mode to store data, the second memory area includes a plurality of second memory cells employing a multi-level mode to store data; a memory controller coupled to the memory device and configured to: based on the current storage space of the first memory area and at least one adjustment threshold, transfer data stored in the first memory area to the second memory area according to a preset transfer mode.
Claims20
A memory system, comprising:
- a memory device comprising a first memory area and a second memory area, wherein the first memory area comprises a plurality of first memory cells employing a single-level mode to store data, the first memory area is a buffer of write booster, and the second memory area comprises a plurality of second memory cells employing a multi-level mode to store data;
- and
- a memory controller coupled to the memory device and configured to:
- receive a first instruction comprising an adjustment threshold;
- and
- based on the adjustment threshold and information related to the first memory area, transfer a part of data stored in the first memory area to the second memory area.
An electronic apparatus, comprising:
- a host system;
- and
- a memory system coupled to the host system, wherein the memory system comprises a memory device and a memory controller coupled to the memory device, the memory device comprises a first memory area and a second memory area, the first memory area comprises a plurality of first memory cells employing a single-level mode to store data, the first memory area is a buffer of write booster, and the second memory area comprises a plurality of second memory cells employing a multi-level mode to store data,
- wherein:
- the host system is configured to send a first instruction comprising an adjustment threshold;
- the memory controller is configured to:
- receive the first instruction from the host system;
- and
- based on the adjustment threshold and information related to the first memory area, transfer a part of the data stored in the first memory area to the second memory area.
An operating method of a memory system comprising a memory device, the memory device comprising a first memory area and a second memory area, the first memory area comprising a plurality of first memory cells employing a single-level mode to store data, the first memory area being a buffer of write booster, the second memory area comprising a plurality of second memory cells employing a multi-level mode to store data, and the operating method comprising:
- receiving a first instruction comprising an adjustment threshold;
- and
- based on the adjustment threshold and information related to the first memory area, transferring a part of data stored in the first memory area to the second memory area.
Dependencies are inferred from the claim text.