Back to results
US 12,610,839 B2Granted
Packaged microelectronic devices having stacked interconnect elements and methods for manufacturing the same
AssigneeMicron Technology, Inc.
InventorsYoung Do Kweon, Tongbi Jiang
Life of this patent
Estimating the term…
Abstract
Microelectronic devices and method of forming a plurality of microelectronic devices on a semiconductor workpiece are disclosed herein. One such method includes placing a plurality of first interconnect elements on a side of a semiconductor workpiece, forming a layer on the side of the workpiece, reshaping the first interconnect elements by heating the first interconnect elements, and coupling a first portion of a plurality of individual second interconnect elements to corresponding first interconnect elements with a second portion of the individual second interconnect elements exposed.
Claims20
A semiconductor device, comprising:
- a substrate;
- a semiconductor die formed on the substrate, the semiconductor die including an integrated circuit and a plurality of terminals on an outer surface of the substrate, the plurality of terminals operably coupled to the integrated circuit;
- a plurality of first interconnect elements carried by the outer surface of the substrate and electrically coupled to corresponding terminals of the plurality of terminals, wherein each individual first interconnect element includes:
- an intermediate portion separated from the outer surface of the substrate by a first distance, wherein the intermediate portion has a first diameter;
- and
- a generally flat distal surface separated from the outer surface of the substrate by a second distance greater than the first distance, wherein the generally flat distal surface has a second diameter smaller than the first diameter;
- a protective layer carried by the outer surface of the substrate, the protective layer having an outermost surface extending parallel to the outer surface of the substrate, wherein the outermost surface of the protective layer is separated from the outer surface of the substrate by the first distance such that the outermost surface of the protective layer is coplanar with the intermediate portion and not coplanar with the generally flat distal surface;
- and
- a plurality of second interconnect elements attached to the generally flat distal surface on corresponding first interconnect elements.
6 more elements
A semiconductor device, comprising:
- a semiconductor die formed within a substrate, the semiconductor die having an active surface and a terminal at the active surface;
- a first interconnect element carried by the active surface and electrically coupled to the terminal, wherein the first interconnect element includes a planar distal surface resulting from a partial reflow process without removing material from the first interconnect element, and wherein the planar distal surface is separated from the active surface by a first distance;
- a protective layer carried by the active surface, the protective layer having an outermost surface separated from the active surface by a second distance smaller than the first distance, such that the outermost surface of the protective layer is not coplanar with the planar distal surface and such that a portion of the first interconnect element extends beyond the outermost surface of the protective layer;
- and
- a second interconnect element bonded to the planar distal surface of the first interconnect element.
2 more elements
A semiconductor device, comprising:
- a substrate having a first surface and a second surface;
- a semiconductor die formed in the substrate, the semiconductor die comprising an integrated circuit and a terminal exposed at the first surface of the substrate;
- a protective layer carried by the first surface of the substrate;
- a first interconnect element carried by the first surface and having a central axis extending away from the first surface, the first interconnect element including:
- a proximal portion electrically coupled to the terminal and at least partially surrounded by the protective layer, wherein the proximal portion slopes inward toward the central axis adjacent to an outermost surface of the protective layer;
- and
- a distal portion exposed beyond the protective layer and having a planar distalmost surface that is not coplanar with the outermost surface of the protective layer;
- and
- a second interconnect element electrically coupled to the planar distalmost surface of the first interconnect element.
6 more elements
Dependencies are inferred from the claim text.