Packaged high voltage MOSFET device with connection clip and manufacturing process thereof

A device, comprising:

• a package that includes:
• a leadframe having a lead and a die support;
• a die on the die support, the die including:
• a substrate with a first surface opposite a second surface along a first direction;
• a plurality of gate conductive regions on the first surface;
• a plurality of source contact regions on the first surface adjacent to the plurality of gate conductive regions, the plurality of source contact regions each having a third surface opposite the first surface, the third surface having a first portion that is separated from the first surface by a first distance along the first direction and a second portion that is separated from the first surface by a second distance along the first direction that is greater than the first distance, the second portion being aligned with a respective gate conductive region of the plurality of gate conductive regions along the first direction;
• a plurality of gate passivation regions on the plurality of gate conductive regions, the plurality of gate passivation regions having a fourth surface opposite a fifth surface along the first direction, the fourth surface being closer to the first surface along the first direction than the fifth surface is, the first surface and the fourth surface being separated by a third distance along the first direction, the fifth surface having a first portion separated from the first surface along the first direction by a fourth distance greater than the third distance, the fifth surface having a second portion separated from the first surface by a fifth distance greater than the third and fourth distances;
• and
• a barrier layer on the plurality of gate passivation regions and on the plurality of source contact regions.

A device, comprising:

• a leadframe having a lead and a die support;
• a die on the die support, the die including:
• a substrate having a first surface;
• a body region extending into the substrate along a first direction from the first surface;
• a plurality of gate conductive regions;
• a plurality of source contact regions;
• a plurality of gate passivation regions, each having a first portion separated from the body region along the first direction by one of the plurality of source contact regions and a second portion aligned with one of the plurality of gate conductive regions along the first direction, the second portion extending further from the body region along the first direction than the first portion, each gate passivation region having a second surface with a first portion and a second portion;
• and
• a barrier layer on the plurality of gate passivation regions and on the plurality of source contact regions;
• and
• a package including a conductive clip, the conductive clip being separated from each of the plurality of source contact regions along a first direction by a first distance, and from each of the plurality of gate passivation regions along the first direction by a second distance greater than the first distance.