Integrated cooling assemblies for advanced device packaging and methods of manufacturing the same
AssigneeAdeia Semiconductor Bonding Technologies Inc.
InventorsGaius Gillman Fountain, Jr., Belgacem Haba, George Carlton Hudson, Pawel Mrozek, Suhail Jaan Sadiq, Laura Mirkarimi
Life of this patent
Estimating the term…
Abstract
A method of manufacturing a device package. The method comprises patterning a first substrate to form patterned regions comprising a thermal oxide layer. The method further comprises directly bonding the patterned regions of the first substrate to a second substrate to form a bonding interface. The bonded first and second substrates form an integrated cooling assembly comprising a coolant chamber volume. Portions of the first substrate exposed to the coolant chamber volume comprise a native oxide layer.
Claims18
A device package comprising:
- an integrated cooling assembly comprising a semiconductor device and a cold plate attached to the semiconductor device, wherein:
- the cold plate comprises a top portion and a bottom portion;
- the bottom portion is bonded to a backside of the semiconductor device;
- the top portion comprises sidewalls extending downwardly to the bottom portion to define a coolant chamber volume therebetween;
- a width of the coolant chamber volume between opposite sidewalls of the top portion is greater than a width of the backside of the semiconductor device;
- and
- a sidewall defining an opening in the bottom portion exposes a portion of the backside of the semiconductor device to the coolant chamber volume.
A device package comprising:
- an integrated cooling assembly comprising a semiconductor device and a cold plate attached to the semiconductor device, wherein:
- the cold plate comprises a top portion and a bottom portion;
- the bottom portion is bonded to a backside of the semiconductor device;
- the top portion comprises sidewalls extending downwardly to the bottom portion to define a coolant chamber volume therebetween;
- a width of the coolant chamber volume between opposite sidewalls of the top portion is greater than a width of the backside of the semiconductor device;
- and
- the bottom portion is bonded to the sidewalls at a bonded interface.
A device package comprising:
- an integrated cooling assembly comprising a semiconductor device and a cold plate attached to the semiconductor device, wherein:
- the cold plate comprises a top portion and a bottom portion;
- the bottom portion is bonded to a backside of the semiconductor device;
- the bottom portion comprises a thermal oxide layer;
- the top portion comprises sidewalls extending downwardly to the bottom portion to define a coolant chamber volume therebetween;
- a width of the coolant chamber volume between opposite sidewalls of the top portion is greater than a width of the backside of the semiconductor device;
- and
- the sidewalls are bonded to the thermal oxide layer to form a bonded interface.
A device package comprising:
- an integrated cooling assembly comprising a semiconductor device and a cold plate attached to the semiconductor device, wherein:
- the cold plate comprises a top portion and a bottom portion;
- the bottom portion is bonded to a backside of the semiconductor device;
- the top portion comprises sidewalls extending downwardly to the bottom portion to define a coolant chamber volume therebetween;
- a width of the coolant chamber volume between opposite sidewalls of the top portion is greater than a width of the backside of the semiconductor device;
- the sidewalls comprise a thermal oxide layer;
- and
- the bottom portion is bonded to the sidewalls to form a bonded interface.
A device package comprising:
- an integrated cooling assembly comprising a semiconductor device and a cold plate attached to the semiconductor device, wherein:
- the cold plate comprises a top portion and a bottom portion;
- the bottom portion is bonded to a backside of the semiconductor device;
- the bottom portion comprises a thermal oxide layer;
- the top portion comprises sidewalls extending downwardly to the bottom portion to define a coolant chamber volume therebetween;
- the sidewalls comprise a thermal oxide layer;
- the thermal oxide layer of the bottom portion is bonded to the thermal oxide layer of the sidewalls to form a bonded interface;
- and
- a width of the coolant chamber volume between opposite sidewalls of the top portion is greater than a width of the backside of the semiconductor device.
A device package comprising:
- an integrated cooling assembly comprising a semiconductor device and a cold plate attached to the semiconductor device, wherein:
- the cold plate comprises a top portion and a bottom portion;
- the bottom portion is bonded to a backside of the semiconductor device;
- the top portion comprises sidewalls extending downwardly to the bottom portion to define a coolant chamber volume therebetween;
- portions of the top portion exposed to the coolant chamber volume comprise a native oxide layer;
- and
- a width of the coolant chamber volume between opposite sidewalls of the top portion is greater than a width of the backside of the semiconductor device.
A device package comprising:
- an integrated cooling assembly comprising a semiconductor device and a cold plate attached to the semiconductor device, wherein:
- the cold plate comprises a top portion and a bottom portion;
- the bottom portion is bonded to a backside of the semiconductor device;
- the top portion comprises sidewalls extending downwardly to the bottom portion to define a coolant chamber volume therebetween;
- portions of the bottom portion exposed to the coolant chamber volume comprise a native oxide layer;
- and
- a width of the coolant chamber volume between opposite sidewalls of the top portion is greater than a width of the backside of the semiconductor device.
A device package comprising:
- an integrated cooling assembly comprising a semiconductor device and a cold plate attached to the semiconductor device, wherein:
- the cold plate comprises a top portion and a bottom portion;
- the bottom portion is bonded to a backside of the semiconductor device;
- the top portion comprises sidewalls extending downwardly to the bottom portion to define a coolant chamber volume therebetween;
- portions of the bottom portion and portions of the top portion exposed to the coolant chamber volume both comprise a native oxide layer;
- and
- a width of the coolant chamber volume between opposite sidewalls of the top portion is greater than a width of the backside of the semiconductor device.
A device package comprising:
- an integrated cooling assembly comprising a semiconductor device, a cold plate attached to the semiconductor device, and a heat sink attached to the cold plate wherein:
- the cold plate comprises a top portion and a bottom portion;
- the bottom portion is bonded to a backside of the semiconductor device;
- the top portion comprises sidewalls extending downwardly to the bottom portion to define a coolant chamber volume therebetween;
- a width of the coolant chamber volume between opposite sidewalls of the top portion is greater than a width of the backside of the semiconductor device;
- and
- the heat sink is attached to the cold plate with a compliant adhesive layer.
Dependencies are inferred from the claim text.