Semiconductor structure, test structure, manufacturing method and test method

A method for manufacturing a test structure, comprising:

• a substrate, wherein the substrate comprises a plurality of pillars spaced along a first direction by first trenches;
• second trenches formed at opposite sides along a second direction of each of the pillars;
• target conductive structures extending along the second direction formed in the substrate directly below adjacent second trenches;
• and a first dielectric layer, a conductive layer and a second dielectric layer sequentially stacked in the first trenches and the second trenches, wherein a depth of the first trenches is greater than a depth of the second trenches;
• and
• the first direction intersects the second direction;
• forming a first pad electrically connected with one of the pillars;
• and
• forming at least one of a second pad or a third pad, wherein the second pad is electrically connected with the conductive layer, and the third pad is electrically connected with one of the target conductive structures.