Method of forming a resistive memory device with ultra-thin barrier layer

A method of fabricating a resistive memory device, comprising:

• depositing a continuous barrier layer comprising a conductive oxide, nitride or oxynitride material over an upper surface and a side surface of an etch stop layer and an upper surface of a metal feature using a conformal deposition process, the continuous barrier layer having a thickness of 6 nm or less;
• depositing a continuous bottom electrode, a continuous switching layer, and a continuous top electrode layer over the continuous barrier layer;
• and
• etching through portions of the continuous barrier layer to provide a layer stack comprising a discrete barrier layer, a discrete bottom electrode over the discrete barrier layer, a discrete switching layer over the discrete bottom electrode, and a discrete top electrode over the discrete switching layer, wherein the discrete barrier layer extends within an opening through the etch stop layer and extends horizontally wider than the metal feature, wherein the etch stop layer is exposed around a periphery of the layer stack.

A method of fabricating a resistive memory device, comprising:

• depositing an etch stop layer comprising a dielectric material;
• etching a plurality of openings through the etch stop layer wherein a metal feature is exposed within each of the openings, wherein each opening exposes a portion of an upper surface of the metal feature;
• depositing a continuous barrier layer having a thickness of 6 nm or less over the etch stop layer and in electrical contact with the metal feature;
• depositing a continuous bottom electrode layer, a continuous switching layer and a continuous top electrode layer over the continuous barrier layer;
• and
• performing one or more etching processes to remove portions of the continuous top electrode layer, the continuous switching layer, the continuous bottom electrode layer and the continuous barrier layer to expose an upper surface of the etch stop layer and provide a plurality of layer stacks, each layer stack comprising a discrete barrier layer that extends within a respective one of the openings through the etch stop layer, extends horizontally wider than the metal feature, and is in electrical contact with the metal feature, a bottom electrode over the barrier layer, a switching layer over the bottom electrode, and a top electrode over the switching layer, wherein the etch stop layer extends between the plurality of layer stacks, and a thickness of an area of the etch stop layer extending between the layer stacks has a half-range uniformity percentage of less than 9%.