FCNVM-ALEFD (fully covered non-volatile memory (NVM) over advanced low electrostatic field transistor (ALEFD)

A method for manufacturing a transistor structure comprising:

• forming a substrate having a top planar surface;
• forming a selective low temperature epitaxial source region entirely above the top planar surface, the selective low temperature epitaxial source region having a first sidewall;
• forming a selective low temperature epitaxial drain region entirely above the top planar surface, the selective low temperature epitaxial drain region having a second sidewall facing the first sidewall, wherein the selective low temperature epitaxial source region is separated from the selective low temperature epitaxial drain region by a gap defined by the first and second sidewalls;
• forming a gate dielectric in the gap and contacting the substrate;
• forming a first sidewall isolation on the first sidewall and above the gate dielectric;
• forming a second sidewall isolation on the second sidewall and above the gate dielectric;
• forming first and second metal layers above and in contact with the selective low temperature epitaxial source region and the selective low temperature epitaxial drain region, respectively;
• forming first and second isolation layers above and in contact with the first and second metal layers, respectively;
• forming a floating gate having a first portion filling the gap above the gate dielectric and a second portion above the first portion and extending beyond the first and second sidewalls such that the second portion overlaps the selective low temperature epitaxial source region and the selective low temperature epitaxial drain region;
• and
• forming a control gate fully covering five sides of the second portion of the floating gate, the control gate being separated from the floating gate by a coupling dielectric and being separated from the first and second metal layers by the first and second isolation layers, respectively.