Amorphous silicon thin-film transistor, method for preparing same, and display panel

A display panel, comprising:

• a base substrate, and a plurality of amorphous silicon thin-film transistors disposed on the base substrate;
• wherein the amorphous silicon thin-film transistor comprises:
• an amorphous silicon semiconductor layer, a source electrode, and a drain electrode that are successively disposed on a base substrate;
• wherein ions doped by an ion implantation process are present in a region, proximal to the source electrode and the drain electrode, of the amorphous silicon semiconductor layer, a concentration of the ions in a surface region, proximal to the source electrode and the drain electrode, of the amorphous silicon semiconductor layer being greater than or equal to 5*10{circumflex over ( )}20 atoms/cc;
• wherein the base substrate is provided with the amorphous silicon thin-film transistors and low temperature poly-silicon thin-film transistors synchronously, wherein the ions doped by the ion implantation process are present at the depth of the surface region, proximal to the source electrode and the drain electrode, of the amorphous silicon semiconductor layer, and the concentration of the ions increases first and then decreases along a direction away from the surface region;
• wherein a thickness of a region where the concentration of the ions increases is less than a thickness of a region where the concentration of the ions decreases.

An amorphous silicon thin-film transistor, comprising:

• an amorphous silicon semiconductor layer, a source electrode, and a drain electrode that are successively disposed on a base substrate;
• wherein ions doped by an ion implantation process are present in a region, proximal to the source electrode and the drain electrode, of the amorphous silicon semiconductor layer, a concentration of the ions in a surface region, proximal to the source electrode and the drain electrode, of the amorphous silicon semiconductor layer being greater than or equal to 5*10{circumflex over ( )}20 atoms/cc,
• wherein the amorphous silicon semiconductor layer comprises a first amorphous silicon semiconductor layer and a second amorphous silicon semiconductor layer that are stacked along a direction away from the base substrate;
• wherein a thickness of the first amorphous silicon semiconductor layer is less than a thickness of the second amorphous silicon semiconductor layer, and a density of the first amorphous silicon semiconductor layer is greater than a density of the second amorphous silicon semiconductor layer,
• wherein a ratio of the thickness of the first amorphous silicon semiconductor layer to the thickness of the second amorphous silicon semiconductor layer ranges from 0.1 to 0.5.