A non-transitory memory storing one or more programs, which, when executed by one or more processors of a computing system with synchronization circuitry and a content generation and delivery architecture including an image capture device, an image signal processing (ISP) pipeline, a partial frame buffer, a display pipeline, and a display device, cause the computing system to:
- determine a temporal offset associated with the content generation and delivery architecture to reduce a photon-to-photon latency across the content generation and delivery architecture, wherein the temporal offset includes one or more of a jitter delay and deterministic or non-deterministic temporal padding;
- obtain a first reference rate associated with a portion of the content generation and delivery architecture;
- generate, via the synchronization circuitry, a synchronization signal for the content generation and delivery architecture based at least in part on the first reference rate;
- and operate the content generation and delivery architecture according to the synchronization signal and the temporal offset.