Memory device and internal voltage measuring method thereof
AssigneeNanya Technology Corporation
InventorsChih-Jen Chen, Ting-Shuo Hsu
Life of this patent
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Abstract
A memory device and an internal voltage measuring method thereof are provided. Output pads of a master memory chip and a slave memory chip are coupled. When one of a switching circuit of the master memory chip and a switching circuit of the slave memory chip is turned on, the other of the switching circuit of the master memory chip and the switching circuit of the slave memory chip is turned off.
Claims10
A memory device, comprising:
- a master memory chip, comprising:
- a first control circuit;
- a first output pad;
- and
- a first switching circuit coupled between a first internal voltage output end of the master memory chip and the first output pad, wherein the first control circuit controls the first switching circuit, and the first internal voltage output end is configured to output a first internal voltage;
- and
- at least one slave memory chip, wherein the master memory chip and the slave memory chip are stacked on each other, and each of the slave memory chips comprises:
- a second control circuit;
- a second output pad coupled to the first output pad;
- and
- a second switching circuit coupled between a second internal voltage output end of the slave memory chip and the second output pad, wherein the second internal voltage output end is configured to output a second internal voltage, the second control circuit controls the second switching circuit, and when one of the first switching circuit and the second switching circuit is turned on, the other of the first switching circuit and the second switching circuit is turned off.
An internal voltage measuring method of a memory device, wherein the memory device comprises a master memory chip and at least one slave memory chip, the master memory chip comprises a first output pad, each of the slave memory chips comprises a second output pad, and the internal voltage measuring method of the memory device comprises:
- providing a first internal voltage of the master memory chip from the first output pad by controlling a first switching circuit;
- providing a second internal voltage of the slave memory chip from the second output pad by controlling a second switching circuit, wherein the master memory chip and the slave memory chip are stacked on each other and the first output pad is coupled to the second output pad;
- when measuring the second internal voltage of the slave memory chip, turning off the first switching circuit and turning on the second switching circuit;
- and
- when measuring the first internal voltage of the master memory chip, turning off the second switching circuit and turning on the first switching circuit.
Dependencies are inferred from the claim text.