Apparatus and methods for detecting coupling faults in non-volatile memory devices
AssigneeSanDisk Technologies LLC
InventorXiaochen Zhu
Life of this patent
Estimating the term…
Abstract
An apparatus is provided that includes a memory die including non-volatile memory cells coupled to a signal line, a switching circuit including a control terminal coupled to a first conductor, the switching circuit configured to selectively couple the signal line to a power supply based on a signal level on the first conductor, a second conductor capacitively coupled to the first conductor, and a control circuit coupled to the switching circuit. The control circuit is configured to detect a defect in the first conductor by coupling the second conductor to a first voltage source, coupling the signal line to a second voltage source, and detecting a drop in a voltage of the second voltage source.
Claims20
An apparatus comprising:
- a memory die comprising non-volatile memory cells coupled to a signal line;
- a switching circuit comprising a control terminal coupled to a first conductor, the switching circuit configured to selectively couple the signal line to a power supply based on a signal level on the first conductor;
- a second conductor capacitively coupled to the first conductor;
- and
- a control circuit coupled to the switching circuit, the control circuit configured to detect a defect in the first conductor by:
- coupling the second conductor to a first voltage source;
- coupling the signal line to a second voltage source;
- and
- detecting a drop in a voltage of the second voltage source.
A method comprising:
- providing a memory system comprising a memory die and a discharge circuit, the memory die comprising a non-volatile memory cell coupled to a bit line and a source line, the discharge circuit configured to selectively discharge a signal line to GROUND based on a signal level of a control signal line, the signal line coupled to the source line;
- detecting a leakage current in a power supply coupled to the discharge circuit;
- coupling the bit line to a first voltage source;
- coupling the signal line to a second voltage source;
- and
- detecting a drop in a voltage of the second voltage source,
- wherein the drop in the voltage of the second voltage source increases as a voltage of the first voltage source increases.
A memory system comprising:
- a NAND string comprising non-volatile memory cells coupled to a signal line;
- a switching circuit comprising a transistor comprising a gate terminal coupled to a first conductor, the switching circuit configured to selectively discharge the signal line to GROUND based on a signal level on the first conductor;
- a bit line disposed adjacent the first conductor;
- and
- a control circuit coupled to the switching circuit, the control circuit configured to:
- detect a leakage current in the switching circuit;
- couple the bit line to an erase voltage;
- couple the signal line to internally generated voltage source;
- detect a drop in a voltage of the internally generated voltage source;
- and
- determine that a coupling fault exists in the first conductor.
Dependencies are inferred from the claim text.