Memory device and read voltage setting method thereof
AssigneeMacronix International Co., Ltd.
InventorShuo-Nan Hung
Life of this patent
Estimating the term…
Abstract
A memory device and read voltage setting method are provided. The memory device may be a 3D NAND flash memory circuit, and provides a high-capacity storage medium with favorable performance. The read voltage setting method includes: performing read verify operations on multiple memory cells according to multiple first reading voltage intervals and obtaining multiple first pass memory cells numbers; shifting the respective first reading voltage intervals by a shift voltage value to obtain multiple second reading voltage intervals; determining whether there is at least one consecutive equal number or a minimum number of the pass cells numbers and setting a read voltage according to the at least one equal number or the minimum number.
Claims20
A read voltage setting method, comprising:
- setting a plurality of first read voltage intervals;
- performing read verify operations on a plurality of memory cells according to the plurality of first read voltage intervals, and obtaining first pass memory cell numbers respectively corresponding to the plurality of first read voltage intervals;
- shifting each of the plurality of first read voltage intervals by a shift voltage value to obtain a plurality of second read voltage intervals, wherein the shift voltage value is smaller than a width of each of the plurality of first read voltage intervals;
- performing the read verify operations on the plurality of memory cells according to the plurality of second read voltage intervals, and obtaining second pass memory cell numbers respectively corresponding to the plurality of second read voltage intervals;
- and
- determining whether there is at least one consecutive equal number, or a minimum value among the first pass memory cell numbers and the second pass memory cell numbers and setting a read voltage according to each of the plurality of first read voltage intervals and each of the plurality of second read voltage intervals corresponding to at least one consecutive equal number or the minimum value.
A read voltage setting method, comprising:
- setting a plurality of first read voltage intervals;
- performing read verify operations on a plurality of memory cells according to the plurality of first read voltage intervals, and obtaining first pass memory cell numbers respectively corresponding to the plurality of first read voltage intervals;
- determining a minimum value among the first pass memory cell numbers, and setting a selected read voltage interval according to each of the plurality of first read voltage intervals corresponding to the minimum value;
- setting a plurality of second read voltage intervals according to a shift voltage value for the selected read voltage interval;
- performing the read verify operations on the memory cells according to the plurality of second read voltage intervals, and obtaining second pass memory cell numbers respectively corresponding to the plurality of second read voltage intervals;
- and
- setting a read voltage according to a second read voltage interval of the plurality of second read voltage intervals which corresponding to a minimum value among the second pass memory cell numbers.
A memory device, comprising:
- a memory block, having a plurality of memory cells;
- a sensing circuit, coupled to the plurality of memory cells and performing a data read operation on the plurality of memory cells;
- and
- a controller, coupled to the sensing circuit and the memory block, and configured to:
- set a plurality of first read voltage intervals;
- perform read verify operations on the plurality of memory cells according to the plurality of first read voltage intervals, and obtain first pass memory cell numbers respectively corresponding to the plurality of first read voltage intervals;
- shift each of the plurality of first read voltage intervals by a shift voltage value to obtain a plurality of second read voltage intervals, wherein the shift voltage value is smaller than a width of each of the plurality of first read voltage intervals;
- perform the read verify operations on the plurality of memory cells according to the plurality of second read voltage intervals, and obtain second pass memory cell numbers respectively corresponding to the plurality of second read voltage intervals;
- and
- determining whether there is at least one consecutive equal number, or a minimum value among the first pass memory cell numbers and the second pass memory cell numbers and setting a read voltage according to each of the plurality of first read voltage intervals and each of the plurality of second read voltage intervals corresponding to at least one consecutive equal number or the minimum value.
A memory device, comprising:
- a memory block, having a plurality of memory cells;
- a sensing circuit, coupled to the plurality of memory cells and performing a data read operation on the plurality of memory cells;
- and
- a controller, coupled to the sensing circuit and the memory block, and configured to:
- set a plurality of first read voltage intervals;
- perform read verify operations on the plurality of memory cells according to the plurality of first read voltage intervals, and obtain first pass memory cell numbers respectively corresponding to the plurality of first read voltage intervals;
- determine a minimum value among the first pass memory cell numbers, and setting a select read voltage interval according to each of the plurality of first read voltage intervals corresponding to the minimum value;
- set a plurality of second read voltage intervals according to a shift voltage value for the selected read voltage interval;
- perform the read verify operations on the plurality of memory cells according to the plurality of second read voltage intervals, and obtain second pass memory cell numbers respectively corresponding to the plurality of second read voltage intervals;
- and
- set a read voltage according to a second read voltage interval of the plurality of second read voltage intervals corresponding to a minimum value among the second pass memory cell numbers.
Dependencies are inferred from the claim text.