Memory device and operation method thereof, and memory system

A memory system, comprising:

• one or more memory devices, comprising:
• a memory cell array comprising a plurality of blocks;
• and
• a peripheral circuit coupled to the memory cell array and configured to:
• apply a plurality of different erasure verification voltages to a selected block among the plurality of blocks after applying a first effective erasure voltage to the selected block;
• determine a preset duration from among a plurality of preset durations for applying a second effective erasure voltage to the selected block according to a plurality of erasure verification results corresponding to the plurality of different erasure verification voltages, the second effective erasure voltage being greater than the first effective erasure voltage;
• and
• apply the second effective erasure voltage to the selected block based on the preset duration;
• and
• a memory controller coupled to the memory devices and controlling the memory devices.

A method of operating a memory device, comprising:

• applying a plurality of different erasure verification voltages to a selected block of the memory device after applying a first effective erasure voltage to the selected block;
• determining a preset duration from among a plurality of preset durations for applying a second effective erasure voltage to the selected block according to a plurality of erasure verification results corresponding to the plurality of different erasure verification voltages;
• and
• applying the second effective erasure voltage to the selected block based on the preset duration,
• wherein the second effective erasure voltage is greater than the first effective erasure voltage.