Method for detecting an error in an electronic memory

A method for detecting at least one fault caused by a photoelectric or radiative effect in a non-volatile semiconductor memory, the memory comprising a plurality of memory cells containing MOS transistors, potentially floating-gate MOS transistors, each memory cell being located at the intersection of an elementary bit line and of a word line, in which method to detect the potential presence of at least one fault during programming of at least one memory cell, a comparison is made between the current flowing through at least one elementary bit line other than the one to which the memory cell being programmed belongs, and a predefined threshold representative of the presence of at least one fault in this line.

A non-volatile semiconductor memory circuit, the memory circuit being configured to detect the potential presence of at least one fault caused by a photoelectric or radiative effect, and comprising a plurality of memory cells containing MOS transistors, potentially floating-gate MOS transistors, each memory cell being located at the intersection of an elementary bit line and of a word line, the memory circuit comprising at least one alarm circuit the input of which is connected to at least one elementary bit line via which fault detection is performed, the alarm circuit having an output the state of which indicates whether or not said at least one fault is present,

• the alarm circuit being configured to:
• detect the potential presence of at least one fault during read-out of a memory cell, the binary content of a memory cell being read out by detecting a read current flowing through this memory cell during read-out after this memory cell has been selected by means of the elementary bit line and word line, by making a comparison between the total current flowing through said at least one elementary bit line via which fault detection is performed, and a predefined threshold representative of the presence of at least one fault in one or more memory cells other than the one being read out.

A non-volatile semiconductor memory circuit, the memory circuit being configured to detect the potential presence of at least one fault caused by a photoelectric or radiative effect, and comprising a plurality of memory cells containing MOS transistors, potentially floating-gate MOS transistors, each memory cell being located at the intersection of an elementary bit line and of a word line, the memory circuit comprising at least one alarm circuit the input of which is connected to at least one elementary bit line via which fault detection is performed, the alarm circuit having an output the state of which indicates whether or not said at least one fault is present, the alarm circuit being configured to detect the potential presence of at least one fault during programming of at least one memory cell, by making a comparison between the current flowing through at least one elementary bit line other than the one to which the memory cell being programmed belongs, and a predefined threshold representative of the presence of at least one fault in this line.