Programming erase blocks coupled to a same string

An apparatus, comprising:

• a memory array comprising a plurality of strings of memory cells, wherein each string of the plurality of strings comprises:
• a first group of memory cells coupled to a first group of access lines and corresponding to a first erase block having a first programming characteristic such that the memory array comprises a plurality of first erase blocks respectively corresponding to the plurality of strings;
• and
• a second group of memory cells coupled to a second group of access lines and corresponding to a second erase block having a second programming characteristic such that the memory array comprises a plurality of second erase blocks respectively corresponding to the plurality of strings;
• and
• a controller coupled to the memory array and configured to:
• receive data corresponding to a sequence of write commands;
• write a first portion of the data to one or more first erase blocks of the plurality of first erase blocks over a first time period;
• and
• write, in response to expiration of the first time period and to write the data sequentially to the plurality of first erase blocks and the plurality of second erase blocks in an interleaved manner, a second portion of the data to one or more second erase blocks of the plurality of second erase blocks over a second time period, wherein at least one first erase block of the one or more first erase blocks and at least one second erase block of the one or more second erase blocks are part of a same physical block of the plurality of strings.

An apparatus, comprising:

• a memory array comprising a plurality of strings of memory cells, wherein each string of the plurality of strings comprises:
• a first group of memory cells coupled to a first group of access lines and corresponding to a first erase block having a first programming characteristic such that the memory array comprises a plurality of first erase blocks respectively corresponding to the plurality of strings;
• and
• a second group of memory cells coupled to a second group of access lines and corresponding to a second erase block having a second programming characteristic such that the memory array comprises a plurality of second erase blocks respectively corresponding to the plurality of strings;
• and
• a controller coupled to the memory array and configured to:
• receive data corresponding to a sequence of write commands to write the data to the memory array;
• write a first portion of data corresponding to the sequence of write commands to one or more first erase blocks of the plurality of first erase blocks over a first time period;
• and
• write, responsive to expiration of the first time period, a second portion of the data to one or more second erase blocks of the plurality of second erase blocks over a second time period, wherein at least one first erase block of the one or more first erase blocks and at least one second erase block of the one or more second erase blocks are part of a same physical block of the plurality of strings.