Neuromorphic circuit based on 2T2R RRAM cells

A neuromorphic circuit suitable for implementing a neural network with binary output, the neuromorphic circuit comprising:

• word lines,
• pairs of complementary bit-lines,
• source lines,
• a set of elementary cells organized according to a two-dimensional matrix comprising rows and columns,
• the set of elementary cells including a storage assembly grouping together a set of lines of elementary cells, the elementary cells of the storage assembly being memory cells, where memory cells of the same line can be selected by a word line, the memory cells of the same column being connected to a pair of complementary bit-lines and a source line,
• each memory cell comprising two memristors and two switches, each memristor being connected to the same source line and to a corresponding switch, each memristor storing a weight or an inverse of the same weight, respectively, and having different first and second resistance values, respectively, the switches being connected for activation thereof, to a word line and correspondingly connected to a pair of complementary bit-lines,
• each pair of complementary bit lines receiving complementary input voltages during a neural calculation operation,
• an electronic circuit implementing a neurone having an output and including:
• a set of logic components, each logic component having a logic unit comprising an input connected to a corresponding source line, the logic unit being suitable for performing a logic operation which switches between a low value and a high value depending only on a value of the input of the logic unit which is connected to the source line during said neuronal calculation operation, each logic unit performing a logic function such as an inverter or a double inverter,
• a counting unit, the counting unit being suitable for counting a number of high or low values at an output of the logic components, the counting unit being a bridge, a bridge being a set of the same elements in parallel and connected to each other at one of terminals thereof to an output of the counting unit, each element being connected to a corresponding logic component and being a resistor or a capacitor, and
• a comparison unit comprising a comparator and a comparison voltage generator, the comparator being suitable for comparing the output of the counting unit with a comparison voltage generated by the comparison voltage generator so as to output a signal depending on the comparison and corresponding to the output of the electronic circuit implementing a neurone.