Back to results
US 12,609,086 B2Granted
Level shifter and display device including same
AssigneeLG Display Co., Ltd.
InventorsSang Uk Lee, Hoon Jang, Jung Jae Kim
Life of this patent
Estimating the term…
Abstract
A display apparatus includes a display panel configured to display an image, a level shifter configured to extract and output data from a data map of a memory and divide a serial output signal output thereto into a parallel output signal to output periodic signals, based on an enable signal, and a shift register configured to output gate signals which are to be applied to the display panel, based on the periodic signals output from the level shifter.
Claims19
A display apparatus comprising:
- a display panel configured to display an image;
- a level shifter configured to obtain output data from a data map of a memory, divide an obtained serial output signal into a parallel output signal, and output periodic signals, based on an enable signal;
- and
- a shift register configured to output gate signals which are to be applied to the display panel, based on the periodic signals output from the level shifter,
- wherein the level shifter comprises a controller and a selector configured to generate a selection signal for selecting an operation condition of the controller, based on the enable signal and a driving selection signal,
- wherein the controller comprises:
- a plurality of markers configured to respectively store address values differentiated from one another;
- a counter configured to generate a count signal, based on the enable signal;
- and
- a de-multiplexer configured to output an enable control signal for controlling an enable switch so that the enable signal is applied to the counter and a marker control signal for turning on one of marker switches so that an address value included in one of the plurality of markers is applied to an address signal input terminal of the counter, based on the selection signal.
7 more elements
A level shifter comprising:
- a memory including a data map where logic values to be output by channels for each address are configured to be sequentially stored;
- a controller configured to generate a count signal and obtain data from the data map of the memory, based on an enable signal;
- a bit split circuit configured to divide a serial output signal output from the memory into a parallel output signal;
- and
- a selector configured to generate a selection signal for selecting an operation condition of the controller, based on the enable signal and a driving selection signal,
- wherein the controller comprises:
- a plurality of markers configured to respectively store address values differentiated from one another;
- a counter configured to generate a count signal, based on the enable signal;
- and
- a de-multiplexer configured to output an enable control signal controlling an enable switch so that the enable signal is applied to the counter and a marker control signal turning on one of marker switches so that an address value included in one of the plurality of markers is applied to an address signal input terminal of the counter, based on the selection signal.
7 more elements
Dependencies are inferred from the claim text.