Pixel circuit and display panel

A pixel circuit comprising:

• a driving transistor;
• a write-in transistor, one of a source or a drain of the write-in transistor being electrically connected to the driving transistor, another of the source or the drain of the write-in transistor being electrically connected to a data line, and a gate of the write-in transistor being connected to a first control line;
• a first light emission control transistor, one of a source or a drain of the first light emission control transistor being electrically connected to one of a source or a drain of the driving transistor, another of the source or the drain of the first light emission control transistor being electrically connected to a positive power supply line, and a gate of the first light emission control transistor being electrically connected to a first light emission control line;
• a second light emission control transistor, one of a source or a drain of the second light emission control transistor being electrically connected to another of the source or the drain of the driving transistor, another of the source or the drain of the second light emission control transistor being electrically connected to a negative power supply line, and a gate of the second light emission control transistor being electrically connected to the first light emission control line or a second light emission control line;
• and
• a first initialization transistor, one of a source or a drain of the first initialization transistor being electrically connected to the source or the drain of the driving transistor, another of the source or the drain of the first initialization transistor being electrically connected to a first initialization line, and a gate of the first initialization transistor being electrically connected to a second control line and configured to respectively initializing a potential of the source or the drain of the driving transistor at least once before and after a charging phase of a frame;
• wherein the pixel circuit further comprises:
• a storage capacitor, one terminal of which being electrically connected to the gate of the driving transistor, and another end of which being electrically connected to the other of the source and the drain of the second light emission control transistor;
• and
• a first transistor, one of a source or a drain of the first transistor being electrically connected to one of the source or the drain of the driving transistor, another of the source or the drain of the first transistor being electrically connected to the gate of the driving transistor, and a gate of the first transistor being electrically connected to a third control line;
• wherein one of the source or the drain of the write-in transistor is electrically connected to another of the source or the drain of the driving transistor;
• under a condition that the first initialization transistor is in a conductive state, the driving transistor is in the conductive state, and the write-in transistor, the first light emission control transistor, the second light emission control transistor, and the first transistor are all in a cutoff state.