Display panel having dual-mode pixel circuit, and display device

A display device, comprising:

• a display panel, wherein
• the display panel comprises a pixel circuit and a light-emitting element;
• the pixel circuit comprises a driving module and a signal conditioning module;
• the driving module comprises a driving transistor;
• a frame time of the display panel comprises a non-light-emitting period and a light-emitting period, the non-light-emitting period comprises a signal conditioning phase, and the signal conditioning module is configured to provide a preset signal for the driving transistor in the signal conditioning phase;
• an image refresh frame of the pixel circuit comprises a data writing frame and a holding frame, the data writing frame comprises p signal conditioning phases, p≥1, and/or, the holding frame comprises q signal conditioning phases, q≥0;
• the pixel circuit is operable in any one of a first mode and a second mode;
• in the first mode, a duration of the non-light-emitting period of the data writing frame is Ld1, and a duration of the non-light-emitting period of the holding frame is Lm1;
• in the second mode, a duration of the non-light-emitting period of the data writing frame is Ld2, and a duration of the non-light-emitting period of the holding frame is Lm2;
• wherein, Ld1>Ld2, and/or, Lm1>Lm2;
• wherein
• in the first mode, in the data writing frame, a total duration of the p signal conditioning phases is Wd1, and in the holding frame, a total duration of the q signal conditioning phase is Wm1;
• in the second mode, in the data writing frame, a total duration of the p signal conditioning phase is Wd2, and in the holding frame, a total duration of the q signal conditioning, phase is Wm2;
• and Wd1/Ld1≠Wm1/Lm1 and/or Wd2/Ld2≠Wm2/Lm2;
• or
• in the first mode, in the data writing frame, a duration of a time period between a start of the non-light-emitting period and a start of a first signal conditioning phase is Tda1, and in the holding frame, a duration of a time period between the start of the non-light-emitting period and the start of the first signal conditioning phase is Tma1;
• in the second mode, in the data writing frame, the duration of the time period between the start of the non-light-emitting period and the start of the first signal conditioning phase is Tda1, and in the holding frame, the duration of the time period between the start of the non-light-emitting period and the start of the first signal conditioning phase is Tma2;
• and Tda1≠Tma1 and/or Tad2≠Tma2;
• or
• in the first mode, in the data writing frame, a duration of a time period between an end of a last signal conditioning phase and an end of the non-light-emitting period is Tdb1, and in the holding frame, a duration of a time period between the end of the last signal conditioning phase and the end of the non-light-emitting period is Tmb1;
• in the second mode, in the data writing frame, a duration of the time period between the end of the last signal conditioning phase and the end of the non-light-emitting period is Tdb2, and in the holding frame, a duration of the time period between the end of the last signal conditioning phase and the end of the non-light-emitting period is Tmb2;
• and Tdb1≠Tmb1 and/or Tdb2≠Tmb2.