DMA techniques for reading 3D data
AssigneeInfineon Technologies AG
InventorsDavid Addison, Dyson Wilkes, Markus Bichl
Life of this patent
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Abstract
A radar system includes a radio frequency (RF) receiver configured to receive radar data at a plurality of receive antennae. A fast Fourier transform (FFT) circuit is coupled to the RF receiver. The FFT circuit is configured to perform a FFT on the radar data to provide a stream of complex values. The stream of complex values includes a plurality of Range-Doppler coordinate pairs that pertain to the plurality of receive antennae. A memory is coupled to the FFT circuit. The memory is configured to store three-dimensional (3D) radar data. A Direct Memory Access circuit (DMA) is coupled to the memory.
Claims13
A radar system:
- a radio frequency (RF) receiver configured to receive radar data at a plurality of receive antennae;
- a fast Fourier transform (FFT) circuit coupled to the RF receiver, the FFT circuit configured to perform an FFT on the radar data to provide a stream of complex values, the stream of complex values including a plurality of Range-Doppler coordinate pairs that pertain to the plurality of receive antennae;
- a memory coupled to the FFT circuit, the memory configured to store three-dimensional (3D) radar data;
- and
- a Direct Memory Access circuit (DMA) coupled to the memory, the DMA comprising an offset control register configured to store one or more Doppler offset values, the DMA configured to, in response to a read request for a subset of Range-Doppler coordinate pairs sharing a Range coordinate, read the Range-Doppler coordinate pairs in the subset multiple times in a loop manner with different starting offsets based on the stored one or more Doppler offset values, with each read corresponding to a different virtual receive antenna.
A baseband processor for radar, comprising a fast Fourier transform (FFT) circuit having an input and an output;
- a memory having an input coupled to the output of the FFT circuit;
- and
- a Direct Memory Access circuit (DMA) coupled to the memory, the DMA comprising an offset control register configured to store one or more Doppler offset values, the DMA configured to, in response to a read request for a subset of Range-Doppler coordinate pairs sharing a Range coordinate, read the Range-Doppler coordinate pairs in the subset multiple times in a loop manner with different starting offsets based on the stored one or more Doppler offset values, with each read corresponding to a different virtual receive antenna;
- wherein the FFT circuit, the memory, and the DMA are disposed on a single silicon substrate.
Dependencies are inferred from the claim text.