Low latency crosstalk mitigation in a nonvolatile memory

A method for data storage, comprising:

• in a storage system comprising circuitry and a plurality of memory cells coupled to multiple WLs and to multiple BLS,
• setting, by the circuitry, a first read voltage to a target WL among the multiple WLs, and setting each of the WLs other than the target WL, including a neighbor WL neighboring to the target WL, to a predefined full conducting voltage or to a predefined partial conducting voltage lower than the full conducting voltage;
• pre-charging the multiple BLs;
• while discharging the pre-charged BLs, reading a page from a group of target memory cells that are coupled to the target WL, multiple times, to produce multiple respective binary readouts, wherein at least one of the binary readouts corresponds to setting the neighbor WL to the partial conducting voltage;
• applying combinational logic of the circuitry implemented in hardware, to the binary readouts, to produce (i) output bits of the page, and (ii) respective binary confidence levels associated with the output bits;
• and
• transmitting the output bits and the binary confidence levels to a controller.