Method, and device for detecting memory fault, medium and server

A server, comprising a processor, a baseboard management controller (BMC) and a memory, wherein the memory comprises a plurality of storage units, the integrated management controller (IMC) is provided on the processor, and the memory is connected to the BMC,

• the IMC is configured to read system event logs (SEL);
• the BMC is configured to perform operations comprising:
• acquire the SEL through the IMC, and monitor operating status of memory based on the SEL, and acquire error information of the memory, wherein the operating status of the memory comprises error information of the plurality of storage units of the memory during a time period when the plurality of storage units are monitored, the error information of the memory acquired comprises a physical address of each of the plurality of storage units where error occurred and time when the error occurred;
• the BMC is further configured to calculate a number of times of a correctable error that occurs in the memory based on the error information, wherein the correctable error is an error that can be corrected using error correction codes (ECC);
• the BMC is further configured to determine a target detection parameter based on the error information in response to the number of times of the correctable error reaching a preset trigger number of times, the target detection parameter comprises an error type, a frequency of occurrence of the error, a pattern of the occurrence of the error and a failure rate, and the error type comprises a hard error and a soft error;
• and
• the BMC is further configured to determine a fault detection result of the memory based on the target detection parameter, and determine whether to issue a fault warning based on the fault detection result, wherein the BMC issues the fault warning and generates a fault log in response to the fault detection result indicating that the memory has a fault or is at risk of a fault, and the BMC is configured to perform a corresponding control operation on the memory based on the fault log, the corresponding control operation comprises restarting the memory, turning off the memory power, or switching to a spare memory;
• wherein the operation of determining the target detection parameter based on the error information comprises:
• the BMC determines a hard fault unit based on a number of times of a hard error that occurs and address information of each of the plurality of storage units;
• and/or, the BMC determines a soft fault unit based on a number of times of a soft error that occurs and the address information of each of the plurality of storage units;
• and/or, in response to the plurality of storage units being arranged in an array structure, the BMC determines the number of storage units with errors in each row based on address information of storage units where errors occur, determines a row where the number of the storage units with the errors exceeds a first preset number as a fault row;
• and/or, determines a number of storage units with errors in each column based on the address information of the storage units where the errors occur, determines a column where the number of the storage units with the errors exceeds a second preset number as a fault column;
• and/or, in response to the array structure of the storage units is divided into a plurality of areas, the BMC determines a number of storage units with errors in each area based on the address information of the storage units where the errors occur, and determines an area where the number of the storage units with the errors exceeds a third preset number as a fault area;
• and/or, the BMC determines a frequency of a correctable error that occurs based on the error information.