Dynamic load balancing in network interface cards for optimal system level performance

A system to perform data traffic load balancing comprising:

• a plurality of CPU cores;
• and
• a network interface controller (NIC) communicatively coupled to the NIC, the NIC comprising:
• an interface to receive data packets to be stored in multiple of a plurality of receive queues in the NIC;
• and
• circuitry to:
• map multiple of the plurality of receive queues to one or more of the plurality of CPU cores communicatively coupled to the NIC;
• monitor a queue length for multiple of the plurality of receive queues;
• and
• based on (1) a threshold queue length of a first receive queue, (2) key-related application partition information, (3) user configurable CPU core-to-queue mapping data, and (4) CPU core utilization-related out-of-band messaging data, probabilistically redirect the data packets mapped to the first receive queue to another one of the plurality of receive queues to perform dynamic load distribution among the plurality of CPU cores;
• wherein:
• respective of the plurality of CPU cores are to exclusively access, in parallel processing, one or more respective of the plurality of receive queues, based upon the key-related application partition information.

One or more non-transitory, computer-readable media comprising instructions that, when executed by a network interface controller (NIC), cause the NIC to perform operations pertaining to load balancing in the NIC, the operations comprising:

• mapping multiple of a plurality of receive queues in the NIC to one or more of a plurality of CPU cores communicatively coupled to the NIC, the plurality of receive queues to store data packets;
• monitoring a queue length for multiple of the plurality of receive queues;
• and
• based on (1) a threshold queue length of a first receive queue, (2) key-related application partition information, (3) user configurable CPU core-to-queue mapping data, and (4) CPU core utilization-related out-of-band messaging data, probabilistically redirecting the data packets mapped to the first receive queue to another one of the plurality of receive queues to perform dynamic load distribution among the plurality of CPU cores;
• wherein:
• respective of the plurality of CPU cores are to exclusively access, in parallel processing, one or more respective of the plurality of receive queues, based upon the key-related application partition information.

A network interface controller (NIC), comprising:

• an interface to receive data packets to be stored in multiple of a plurality of receive queues in the NIC;
• and
• circuitry to:
• select a receive queue from the plurality of receive queues associated with respective CPU cores based on a mapping of specific flows to specific receive queues;
• if no match is found for a specific flow, select another receive queue from the multiple of the plurality of receive queues based on a hash of packet headers of the data packets;
• and
• probabilistically alter the mapping of specific flows to the specific receive queues based on (1) a length of the specific receive queues, (2) key-related application partition information, (3) user configurable CPU core-to-queue mapping data, and (4) CPU core utilization-related out-of-band messaging data;
• wherein:
• the respective CPU cores are to exclusively access, in parallel processing, one or more respective of the plurality of receive queues, based upon the key-related application partition information.

One or more non-transitory computer-readable media comprising instructions that, when executed by a network interface card (NIC), cause the NIC to perform operations pertaining to load balancing in the NIC, the operations comprising:

• selecting a receive queue from a plurality of receive queues in the NIC associated with respective CPU cores based on a mapping of specific flows to specific receive queues;
• if no match is found for a specific flow, selecting another receive queue from the multiple of the plurality of receive queues based on a hash of packet headers of a data packet;
• and
• altering the mapping of specific flows to the specific receive queues based on (1) a length of the specific receive queues, (2) key-related application partition information, (3) user configurable CPU core-to-queue mapping data, and (4) CPU core utilization-related out-of-band messaging data, to probabilistically redirect the specific flows to another core;
• wherein:
• the respective CPU cores are to exclusively access, in parallel processing, one or more respective of the plurality of receive queues, based upon the key-related application partition information.

A network interface controller (NIC), comprising:

• an interface to receive data packets for Key-Value Store workloads to be stored in multiple of a plurality of receive queues in the NIC;
• and
• circuitry to:
• map multiple of the plurality of receive queues to one or more of a plurality of CPU cores communicatively coupled to the NIC;
• monitor a queue length for multiple of the plurality of receive queues;
• and
• in response to detection of congestion of one or more of the plurality of CPU cores based on (1) receive queue length, (2) key-related application partition information, (3) user configurable CPU core-to-queue mapping data, and (4) CPU core utilization-related out-of-band messaging data, probabilistically modify a Receive Side Scaling indirection table to point some hash values to receive queues that are serviced by CPU cores having a lighter load;
• wherein:
• respective of the plurality of CPU cores are to exclusively access, in parallel processing, one or more respective of the plurality of receive queues, based upon the key-related application partition information.