Preemptively cooling of processing unit compute elements

A processing unit, comprising:

• a plurality of compute units comprising a selected subset of compute units;
• a scheduler circuitry to receive a first wavefront for execution at the selected subset of compute units;
• and
• a processor to, in response to the scheduler circuitry receiving the first wavefront, initiate cooling of the selected subset of compute units prior to the scheduler circuitry initiating execution of the first wavefront at the selected subset of compute units based on:
• the first wavefront comprising a first number of compute operations and a second number of memory access operations or interconnect access operations;
• and
• the selected subset of compute units currently executing a wavefront comprising a third number of compute operations and a fourth number of memory access operations or interconnect operations,
• wherein the first number is greater than the third number, and wherein the fourth number is greater than the second number.

A processor configured to:

• initiate preemptive cooling of a selected subset of compute units of a plurality of compute units prior to initiating execution of a first wavefront at the selected subset of compute units based on:
• the first wavefront comprising a first number of compute operations and a second number of memory access operations or interconnect access operations;
• and
• the selected subset of compute units currently executing a wavefront comprising a third number of compute operations and a fourth number of memory access operations or interconnect operations,
• wherein the first number is greater than the third number, and wherein the fourth number is greater than the second number.