Techniques for managed NAND translation with embedded memory systems
AssigneeMicron Technology, Inc.
InventorsWanmo Wong, Brady L. Keays
Life of this patent
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AssigneeMicron Technology, Inc.
InventorsWanmo Wong, Brady L. Keays
Estimating the term…
Methods, systems, and devices for techniques for managed NAND translation with embedded memory systems are described. A host system may generate a first command to access a logical memory address associated with a memory system. The host system may identify a physical memory address of the memory system based on generating the first command. The host system may output to the memory system a second command and the physical memory address, where the second command may be communicated to the memory device using a protocol associated with a controller of the memory system. The memory system may then access memory cells in a memory device associated with the physical memory address based on receiving the second command and the physical memory address.
An apparatus, comprising:
A host system, comprising:
A memory system, comprising:
Dependencies are inferred from the claim text.