Configuration method for a phase-change non-volatile memory
AssigneeSTMicroelectronics International N.V.
InventorJawad Benhammadi
Life of this patent
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Abstract
The present description concerns a method of configuration of a phase-change non-volatile memory, comprising the partitioning of said memory into a first set of one or a plurality of regions having a first maximum number of write cycles and a second set of one or a plurality of other regions having a second maximum number of write cycles greater than the first maximum number of write cycles, the first and second maximum number of write cycles being linked to different physical write parameters.
Claims16
A method of configuration of a non-volatile phase change memory, comprising:
- partitioning the non-volatile phase change memory into a first set of one or more regions having a first maximum number of write cycles and a second set of one or more other regions having a second maximum number of write cycles greater than the first maximum number of write cycles,
- wherein the first and second maximum numbers of write cycles are linked to different physical write parameters, the first maximum number of write cycles corresponds to a use of a first write mode and the second maximum number of write cycles corresponds to a use of a second write mode,
- and wherein the use of the first write mode is defined for one or more regions of one of the first and second sets, the one or more regions of one of the first and second sets correspond to an application requiring a target number of write cycles greater than the first maximum number of write cycles, and the one or more regions of one of the first and second sets are divided into N memory sectors into which data of the application are successively written, N being greater than or equal to the ratio of the target number of write cycles to the first maximum number of write cycles.
A microcontroller provided with a phase-change non-volatile memory, configured to:
- implement a partitioning of the phase-change non-volatile memory into a first set of one or more regions having a first maximum number of write cycles and a second set of one or more other regions having a second maximum number of write cycles greater than the first maximum number of write cycles,
- wherein the first and second maximum numbers of write cycles are linked to different physical write parameters, the first maximum number of write cycles corresponds to a use of a first write mode and the second maximum number of write cycles corresponds to a use of a second write mode,
- and wherein the use of the first write mode is defined for one or more regions of one of the first and second sets, the one or more regions of one of the first and second sets correspond to an application requiring a target number of write cycles greater than the first maximum number of write cycles, and the one or more regions of one of the first and second sets are divided into N memory sectors into which data of the application are successively written, N being greater than or equal to the ratio of the target number of write cycles to the first maximum number of write cycles.
Dependencies are inferred from the claim text.