US 12,608,134 B2 · Memory scheduling device and memory scheduling method

Abstract

A memory scheduling device includes a pre-processing storage, a selector, a current storage, and an arbiter. The pre-processing storage provides a plurality of main commands and a plurality of secondary commands. The selector selects the main commands and/or the secondary commands based on a selection signal. The current storage receives the main commands and/or the secondary commands transmitted from the selector. The arbiter precomputes a predict burst length corresponding to the main commands expected to be received by the current storage based on a round-robin sequence. If the predict burst length corresponding to the main commands is less than a threshold burst length, the arbiter transmits the selection signal to the selector, such that the pre-processing storage transmits a portion of main commands and at least one secondary command of the secondary commands to the current storage through the selector.

Claims20

Dependent claims

A memory scheduling device, comprising:

a pre-processing storage, configured to provide a plurality of main commands and a plurality of secondary commands;
a selector, coupled to the pre-processing storage, and configured to select the main commands and/or the secondary commands based on a selection signal;
a current storage, coupled to the selector, and configured to receive the main commands and/or the secondary commands transmitted from the selector;
and
an arbiter, configured to precompute a predict burst length corresponding to the main commands expected to be received by the current storage based on a round-robin sequence, if the predict burst length corresponding to the main commands is less than a threshold burst length, the arbiter transmits the selection signal to the selector, such that the pre-processing storage transmits a portion of the main commands and at least one secondary command of the secondary commands to the current storage through the selector.

2 more elements

A memory scheduling method, comprising:

precomputing a predict burst length corresponding to a plurality of main commands expected to be received by a current storage based on a round-robin sequence by an arbiter;
if the predict burst length corresponding to the main commands is less than a threshold burst length, transmitting a selection signal to a selector by the arbiter;
and
transmitting a portion of the main commands and at least one secondary command of a plurality of secondary commands to the current storage through the selector by a pre-processing storage.

1 more element

Dependencies are inferred from the claim text.

Memory scheduling device and memory scheduling method

Life of this patent

Memory scheduling device and memory scheduling method

Life of this patent

Abstract

Claims20