Transmitting and receiving circuit including a calculation amplifier and test device including the same

A transmitting and receiving circuit controlled by a processor and transmitting and receiving signals to and from a test target device comprising:

• a first CMOS inverter that converts a level of a first input signal received from the processor, using a first drive signal;
• an RC filter connected to a gate of an NMOS transistor of the first CMOS inverter;
• a voltage divider including a first resistor and a second resistor, the voltage divider configured to output a level conversion signal obtained by reducing a level of an output signal of the first CMOS inverter;
• a first calculation amplifier configured to receive the level conversion signal at a non-inverted input terminal from the voltage divider, the first calculation amplifier including an output terminal and an inverted input terminal connected to each other;
• a third resistor connected between an output terminal of the first calculation amplifier and input and output terminals of the test target device;
• and
• a hysteresis comparator configured to compare a second input signal output by the test target device with the level conversion signal, and output a first output signal to the processor, wherein:
• the level of the first input signal, which is received by the first CMOS inverter from the processor, is the same as the level of the first output signal, which is output by the hysteresis comparator, and
• the level of the first input signal, which is received by the first CMOS inverter from the processor, is greater than the level of the second input signal, which is output by the test target device, and the level of the level conversion signal, which is output by the voltage divider.