# US 12,604,739 B2 · Semiconductor device and method of forming a 3-D stacked semiconductor package structure

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- Number: US 12,604,739 B2
- Document ID: US12604739B2
- Status: Granted
- Kind: B2
- Application number: 18/188,844
- Filed: 2023-03-23
- Published: 2024-09-26
- Granted: 2026-04-14
- Earliest claimed: 2023-03-23
- Assignees: JCET STATS ChipPAC Korea Limited
- Applicants: JCET STATS ChipPAC Korea Limited
- Inventors: SeungHyun Lee; YeJin Park; HeeSoo Lee
- Web page: https://patentgrep.com/patent/US12604739B2

## CPC

- H10W 44/20: at high-frequency [HF] or radio frequency [RF]
- H10W 42/20: protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
- H10W 72/072: {of bump connectors}
- H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W 72/90: Bond pads, in general
- H10W 74/016: {using moulds}
- H10W 74/114: {by a substrate and the encapsulations}
- H10W 74/117: {the substrate having spherical bumps for external connection}
- H10W 90/00: Package configurations
- H10W 44/248: {for antennas}
- H10W 72/29: Bond pads specially adapted therefor
- H10W 72/9413: {on encapsulations}
- H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device has a substrate and a first electrical component disposed over the substrate. An encapsulant is deposited over the first electrical component. A shielding layer is formed over the encapsulant. The shielding layer is patterned to form a conductive trace and a contact pad. A board-to-board (B2B) connector is disposed over the encapsulant and electrically coupled to the substrate by the conductive trace.

## Claims

### Claim 1

A semiconductor device, comprising:
a substrate including a portion of a conductive layer exposed at a side surface of the substrate;
a first electrical component disposed over the substrate;
an encapsulant deposited over the first electrical component;
a shielding layer formed over a top surface of the encapsulant and a side surface of the encapsulant, wherein the shielding layer is patterned over the top surface of the encapsulant and the side surface of the encapsulant to form,
a conductive trace that extends from the top surface of the encapsulant to the side surface of the encapsulant,
a portion of the shielding layer at a first end of the conductive trace on the side surface of the encapsulant patterned to match a shape of the portion of the conductive layer of the substrate exposed at the side surface of the substrate, wherein the portion of the shielding layer is formed directly on the portion of the conductive layer over the substrate, and
a contact pad at a second end of the conductive trace on the top surface of the encapsulant; and
a B2B connector disposed over the encapsulant and electrically coupled to the substrate by the conductive trace.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, wherein the first electrical component is disposed under the B2B connector.

### Claim 3 (depends on 2)

The semiconductor device of claim 2, further including a second electrical component disposed over the substrate, wherein the shielding layer remains unpatterned over the second electrical component.

### Claim 4 (depends on 1)

The semiconductor device of claim 1, wherein the shielding layer is formed with a first number of layers in a first area over the top surface of the encapsulant and the side surface of the encapsulant and a second number of layers less than the first number of layers in a second area over the top surface of the encapsulant and the side surface of the encapsulant, and wherein the shielding layer is patterned to form the conductive trace and contact pad in the second area.

### Claim 5 (depends on 1)

The semiconductor device of claim 1, wherein the encapsulant is molded to include a stepped top surface.

### Claim 6

A semiconductor device, comprising:
a substrate;
an encapsulant deposited over the substrate;
a shielding layer formed over the encapsulant, wherein the shielding layer is patterned on a top surface of the encapsulant and a side surface of the encapsulant to form a conductive trace extending from the top surface of the encapsulant to the side surface of the encapsulant; and
a first electrical component disposed over the encapsulant and electrically coupled to the substrate by the conductive trace.

### Claim 7 (depends on 6)

The semiconductor device of claim 6, further including a second electrical component disposed in the encapsulant under the first electrical component.

### Claim 8 (depends on 6)

The semiconductor device of claim 6, further including a second electrical component disposed in the encapsulant, wherein the shielding layer remains unpatterned over the second electrical component.

### Claim 9 (depends on 6)

The semiconductor device of claim 6, wherein the shielding layer is formed with a first number of layers in a first area and a second number of layers less than the first number of layers in a second area, and wherein the shielding layer is patterned to form the conductive trace in the second area.

### Claim 10 (depends on 6)

The semiconductor device of claim 6, wherein the conductive trace extends to a conductive layer of the substrate.

### Claim 11 (depends on 6)

The semiconductor device of claim 6, wherein the encapsulant is molded to include a stepped top surface.

### Claim 12 (depends on 11)

The semiconductor device of claim 11, wherein a top surface of the encapsulant in a first area is at a greater height above the substrate than a top surface of the first electrical component.

### Claim 13

A method of making a semiconductor device, comprising:
providing a substrate including a portion of a conductive layer exposed at a side surface of the substrate;
disposing a first electrical component over the substrate;
depositing an encapsulant over the first electrical component;
forming a shielding layer over a top surface of the encapsulant and a side surface of the encapsulant;
patterning the shielding layer over the top surface of the encapsulant and the side surface of the encapsulant to form,
a conductive trace that extends from the top surface of the encapsulant to the side surface of the encapsulant,
a portion of the shielding layer at a first end of the conductive trace on the side surface of the encapsulant patterned to match a shape of the portion of the conductive layer of the substrate exposed at the side surface of the substrate, wherein the portion of the shielding layer is formed directly on the portion of the conductive layer over the substrate, and
a contact pad at a second end of the conductive trace on the top surface of the encapsulant; and
disposing a B2B connector over the encapsulant and electrically coupled to the substrate by the conductive trace.

### Claim 14 (depends on 13)

The method of claim 13, further including disposing the B2B connector over the first electrical component.

### Claim 15 (depends on 14)

The method of claim 14, further including disposing a second electrical component over the substrate, wherein the shielding layer remains unpatterned over the second electrical component after patterning the shielding layer to form the conductive trace and contact pad.

### Claim 16 (depends on 13)

The method of claim 13, further including:
forming the shielding layer as a plurality of conductive layers, wherein a mask is disposed over a first area of the encapsulant while forming one or more of the conductive layers; and
patterning the shielding layer to form the conductive trace and contact pad in the first area.

### Claim 17 (depends on 13)

The method of claim 13, further including molding the encapsulant to include a stepped top surface.

### Claim 18

A method of making a semiconductor device, comprising:
providing a substrate;
depositing an encapsulant over the substrate;
forming a shielding layer over the encapsulant;
patterning the shielding layer on a top surface of the encapsulant and a side surface of the encapsulant to form a conductive trace extending from the top surface of the encapsulant to the side surface of the encapsulant; and
disposing a first electrical component over the encapsulant and electrically coupled to the substrate by the conductive trace.

### Claim 19 (depends on 18)

The method of claim 18, further including:
disposing a second electrical component over the substrate;
depositing the encapsulant over the second electrical component; and
disposing the first electrical component over the second electrical component.

### Claim 20 (depends on 18)

The method of claim 18, further including:
disposing a second electrical component over the substrate;
depositing the encapsulant over the second electrical component; and
forming the shielding layer over the second electrical component, wherein the shielding layer remains unpatterned over the second electrical component after patterning the shielding layer to form the conductive trace.

### Claim 21 (depends on 18)

The method of claim 18, further including:
forming the shielding layer as a plurality of conductive layers, wherein a mask is disposed over a first area of the encapsulant while forming one or more of the conductive layers; and
patterning the shielding layer to form the conductive trace in the first area.

### Claim 22 (depends on 18)

The method of claim 18, further including molding the encapsulant to include a stepped top surface.