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US 12,604,733 B2Granted
Package structures with collapse control features
AssigneeIntel Corporation
InventorsWenhao Li, Feras Eid, Michael Baker, Pilin Liu, Zhaozhi Li
Life of this patent
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Abstract
Microelectronic die package structures formed according to some embodiments may include a substrate comprising one or more conductive interconnect structures on a surface of the substrate. One or more support features are on one or more peripheral regions of the surface of the substrate. A first side of a die is coupled to the one or more conductive interconnect structures and is over the one or more support features. A die backside layer is on the second side of the die.
Claims9
A microelectronic die package structure, comprising:
- one or more conductive interconnect structures on a surface of a substrate;
- a die comprising a first side and a second side, wherein the first side of the die is coupled to the one or more conductive interconnect structures;
- one or more support features between the substrate and the die at one or more peripheral regions of the surface of the substrate, wherein the support features are adjacent to the one or more conductive interconnect structures;
- and
- a die backside layer on the second side of the die, wherein the die backside layer comprises at least one of copper, aluminum, silver, gold, or nickel.
2 more elements
Dependencies are inferred from the claim text.