Devices including capacitor coupling power path to ground path and associated components and systems
AssigneeMicrochip Technology Incorporated
InventorYuming Tao
Life of this patent
Estimating the term…
Abstract
The device may include a core. The device may include built-up layers arranged over the core. The device may also include a ground path disposed in a first built-up layer of the built-up layers. The device may also include a power path disposed in a second built-up layer of the built-up layers. The device may also include a multi-terminal capacitor on a top layer of the built-up layers. The multi-terminal capacitor may be coupled to the ground path and the power path through respective vias passing through the built-up layers. The respective vias may be arranged to alternate such that respective vias coupled to the power path neighbor a respective via coupled to the ground path.
Claims19
A device comprising:
- an electronic die;
- a ground path;
- a power path coupled to the electronic die;
- a first capacitor coupled between the power path and the ground path;
- a quiet power path coupled to the electronic die;
- a second capacitor coupled between the quiet power path and the ground path;
- and
- an inductor coupled between the quiet power path and the power path.
A device comprising:
- a core;
- built-up layers arranged over the core;
- a ground path disposed in a first built-up layer of the built-up layers;
- a power path disposed in a second built-up layer of the built-up layers;
- a clean power path disposed in the second built-up layer;
- an inductor coupled between the power path and the clean power path;
- and
- a multi-terminal capacitor on a top layer of the built-up layers, the multi-terminal capacitor coupled to the ground path and the power path through respective vias passing through the built-up layers, wherein the respective vias are arranged to alternate such that respective vias coupled to the power path neighbor a respective via coupled to the ground path.
A device comprising:
- a core;
- built-up layers arranged over the core;
- a ground path;
- a power path;
- a clean power path;
- an inductor coupled between the power path and the clean power path;
- and
- a multi-terminal capacitor on a top layer of the built-up layers, the multi-terminal capacitor coupled to the ground path and the power path through respective vias passing through the built-up layers, wherein the respective vias are arranged to alternate such that respective vias coupled to the power path neighbor a respective via coupled to the ground path;
- wherein one of the ground path and the power path are disposed in a first built-up layer of the built-up layers and another of the ground path and the power path are disposed on a layer of the core.
A method of manufacturing a device comprising:
- forming at least two built-up layers over a core;
- forming a power path and a clean power path on a first built-up layer of the at least two built-up layers;
- forming at least one ground path on a second built-up layer of the at least two built-up layers;
- coupling the power path to the at one on ground path through a first capacitor;
- coupling the clean power path to the at least one ground path through a second capacitor, and
- coupling the power path to the clean power path with an inductor.
Dependencies are inferred from the claim text.