Isolation structure and memory device

A memory device, comprising:

• an isolation structure, comprising:
• an isolation material layer, filled in a trench of a substrate;
• and
• a protection layer, having two portions extending along a horizontal direction of a topmost surface of the substrate, from the topmost surface of the substrate to a top surface of the isolation material layer across boundaries of the trench, and covering opposite edges of the isolation material layer, wherein the two portions of the protection layer are laterally spaced apart from each other, and the protection layer has an etching selectivity with respect to the isolation material layer;
• and
• a gate structure, disposed on the substrate, and comprising:
• a tunneling dielectric layer, lying on the substrate;
• a floating gate, disposed on the tunneling dielectric layer;
• an inter-gate dielectric layer, covering the floating gate, the protection layer and the isolation material layer;
• and
• a control gate, disposed on the inter-gate dielectric layer.