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US 12,604,675 B2Granted
Self-aligned heater for PCRAM using a continuous dielectric
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorSheng-Chih Lai
Life of this patent
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Abstract
A method includes forming a bottom electrode, forming a dielectric layer, forming a Phase-Change Random Access Memory (PCRAM) region in contact with the dielectric layer, and forming a top electrode. The dielectric layer and the PCRAM region are between the bottom electrode and the top electrode. A filament is formed in the dielectric layer. The filament is in contact with the dielectric layer.
Claims20
A structure comprising:
- an array of memory cells comprising:
- a plurality of bottom electrodes forming a plurality of bottom electrode rows and a plurality of bottom electrode columns;
- a dielectric layer, wherein the dielectric layer is a continuous layer that contacts all of the plurality of bottom electrode rows and all of the plurality of bottom electrode columns of the plurality of bottom electrodes;
- a plurality of Phase-Change Random Access Memory (PCRAM) regions in direct contact with the dielectric layer;
- and
- a plurality of top electrodes, wherein the dielectric layer and the PCRAM region are between the plurality of bottom electrodes and the plurality of top electrodes.
3 more elements
A structure comprising:
- an array of memory cells comprising a plurality of memory cell rows and a plurality of memory cell columns, wherein a first memory cell and a second memory cell in the array of memory cells comprise:
- a first dielectric layer;
- a bottom electrode in the first dielectric layer;
- a second dielectric layer over and contacting the bottom electrode and the first dielectric layer;
- a Phase-Change Random Access Memory (PCRAM) region in direct contact with the second dielectric layer, wherein the second dielectric layer in the first memory cell and the second dielectric layer in the second memory cell are parts of a continuous dielectric layer that continuously extends into the plurality of memory cell rows and the plurality of memory cell columns of the array of memory cells, wherein the parts of the continuous dielectric layer form parts of the array of memory cells;
- and
- a top electrode, wherein the PCRAM region is between, and is vertically aligned to the bottom electrode and the top electrode.
4 more elements
A structure comprising:
- a plurality of bottom electrodes forming an array;
- a dielectric layer over and contacting all of the plurality of bottom electrodes that form the array;
- a plurality of chalcogenide semiconductor regions physically contacting the dielectric layer, wherein the dielectric layer extends laterally beyond opposing edges of one of the plurality of bottom electrodes, and extends laterally beyond opposing edges of one of the plurality of chalcogenide semiconductor regions, and wherein the dielectric layer comprises:
- first portions overlapped by the plurality of chalcogenide semiconductor regions;
- and
- second portions vertically misaligned from the plurality of chalcogenide semiconductor regions, wherein the first portions are thicker than the second portions;
- and
- a plurality of top electrodes overlying the plurality of chalcogenide semiconductor regions.
5 more elements
Dependencies are inferred from the claim text.