# US 12,604,609 B2 · Display apparatus having a light-blocking pattern > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,604,609 B2 - Document ID: US12604609B2 - Status: Granted - Kind: B2 - Application number: 17/887,233 - Filed: 2022-08-12 - Published: 2023-02-23 - Granted: 2026-04-14 - Earliest claimed: 2021-08-23 - Assignees: LG Display Co., Ltd. - Applicants: LG Display Co., Ltd. - Inventors: Sung Eun Yoon - Web page: https://patentgrep.com/patent/US12604609B2 ## CPC - H10K 50/865: {comprising light absorbing layers, e.g. light-blocking layers} - H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO} - H10D 86/451: {characterised by the compositions or shapes of the interlayer dielectrics} - H10D 86/481: {integrated with passive devices, e.g. auxiliary capacitors} - H10D 86/60: wherein the TFTs are in active matrices - H10K 59/1213: {the pixel elements being TFTs} - H10K 59/1216: {the pixel elements being capacitors} - H10K 59/126: Shielding, e.g. light-blocking means over the TFTs - H10K 59/131: Interconnections, e.g. wiring lines or terminals - H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract A display apparatus includes a light-blocking pattern on a pixel area of a device substrate; an upper buffer layer on the light-blocking pattern extending on a bending area of the device substrate; a switching thin film transistor on the upper buffer layer including a first semiconductor pattern spaced away from the light-blocking pattern; a separation insulating layer on the first semiconductor pattern extending on the upper buffer layer of the bending area; a driving thin film transistor on the separation insulating layer of the pixel area including a second semiconductor pattern overlapping with the light-blocking pattern; a bending open hole on the bending area including a first bending hole exposing a portion of the upper buffer layer and a second bending hole in the first bending hole; and an intermediate electrode on the separation insulating layer connected to the light-blocking pattern through an intermediate contact hole. ## Claims ### Claim 1 A display apparatus comprising: a light-blocking pattern on a pixel area of a device substrate; an upper buffer layer on the light-blocking pattern, the upper buffer layer extending on a bending area of the device substrate; a switching thin film transistor on the upper buffer layer of the pixel area, the switching thin film transistor including a first semiconductor pattern spaced away from the light-blocking pattern; a separation insulating layer on the first semiconductor pattern, the separation insulating layer extending on the upper buffer layer of the bending area; a driving thin film transistor on the separation insulating layer of the pixel area, the driving thin film transistor including a second semiconductor pattern overlapping with a portion of the light-blocking pattern; a bending open hole on the bending area of the device substrate, the bending open hole including a first bending hole exposing a portion of the upper buffer layer and a second bending hole exposing a portion of the device substrate in the first bending hole; and an intermediate electrode on the separation insulating layer of the pixel area, the intermediate electrode connected to the light-blocking pattern through an intermediate contact hole, wherein the intermediate contact hole includes a first intermediate hole partially exposing the upper buffer layer of pixel area and a second intermediate hole partially exposing a portion of the light-blocking pattern which overlaps the first intermediate hole, and wherein a vertical depth of the first intermediate hole is the same as a vertical depth of the first bending hole. ### Claim 2 (depends on 1) The display apparatus according to claim 1, wherein the first semiconductor pattern includes silicon, and the second semiconductor pattern includes an oxide semiconductor. ### Claim 3 (depends on 1) The display apparatus according to claim 1, wherein a vertical depth of the second intermediate hole is smaller than a vertical depth of the second bending hole. ### Claim 4 (depends on 3) The display apparatus according to claim 3, wherein the bending area of the device substrate includes a substrate recess region overlapping with the second bending hole. ### Claim 5 (depends on 1) The display apparatus according to claim 1, wherein a bottom surface of the first intermediate hole is disposed closer to the device substrate than an upper surface of the upper buffer layer, and wherein the upper buffer layer of the bending area includes an upper recess region overlapping with the first bending hole. ### Claim 6 (depends on 5) The display apparatus according to claim 5, wherein a vertical depth of the upper recess region is the same as a distance between the bottom surface of the first intermediate hole and the upper surface of the upper buffer layer. ### Claim 7 (depends on 1) The display apparatus according to claim 1, wherein a source electrode of the switching thin film transistor is connected to a source region of the first semiconductor pattern through a source contact hole, wherein a drain electrode of the switching thin film transistor is connected to a drain region of the first semiconductor pattern through a drain contact hole, and wherein the source contact hole and the drain contact hole penetrate the first semiconductor pattern. ### Claim 8 (depends on 7) The display apparatus according to claim 7, wherein a vertical depth of the source contact hole is the same as a vertical depth of the first intermediate hole, and wherein a vertical depth of the drain contact hole is the same as a vertical depth of the source contact hole. ### Claim 9 (depends on 1) The display apparatus according to claim 1, further comprising a lower buffer layer between the device substrate and the upper buffer layer, wherein the lower buffer layer extends between the device substrate and the light-blocking pattern. ### Claim 10 (depends on 9) The display apparatus according to claim 9, wherein the light-blocking pattern includes a blocking recess region overlapping with the second intermediate hole. ### Claim 11 A display apparatus comprising: a device substrate including a pixel area and a bending area; a buffer insulating layer on the device substrate, the buffer insulating layer including a stacked structure of a lower buffer layer and an upper buffer layer; a light-blocking pattern between the lower buffer layer and the upper buffer layer of the pixel area; a first switching thin film transistor on the upper buffer layer of the pixel area, the first switching thin film transistor including a first semiconductor pattern disposed outside the light-blocking pattern; a separation insulating layer covering the first semiconductor pattern, the separation insulating layer extending on the upper buffer layer of the bending area; a driving thin film transistor on the separation insulating layer of the pixel area, the driving thin film transistor including a second semiconductor pattern overlapping with a portion of the light-blocking pattern; a bending open hole disposed on the bending area of the device substrate, the bending open hole including a first bending hole exposing a portion of the lower buffer layer and a second bending hole exposing a portion of the device substrate in the first bending hole; and an intermediate electrode on the separation insulating layer of the pixel area, the intermediate electrode connected to the light-blocking pattern through an intermediate contact hole, wherein a vertical depth of the first bending hole is greater than or equal to a vertical depth of the intermediate contact hole. ### Claim 12 (depends on 11) The display apparatus according to claim 11, further comprising a second switching thin film transistor on the separation insulating layer of the pixel area, wherein the second switching thin film transistor includes a third semiconductor pattern made of the same material as the second semiconductor pattern, and wherein the third semiconductor pattern is spaced away from the intermediate electrode and the second semiconductor pattern. ### Claim 13 (depends on 11) The display apparatus according to claim 11, wherein the lower buffer layer of the bending area includes a lower recess region overlapping with the first bending hole. ### Claim 14 (depends on 13) The display apparatus according to claim 13, wherein a source electrode of the first switching thin film transistor is connected to a source region of the first semiconductor pattern through a source contact hole, wherein a drain electrode of the first switching thin film transistor is connected to a drain region of the first semiconductor pattern through a drain contact hole, and wherein a bottom surface of the source contact hole and a bottom surface of the drain contact hole are disposed closer to the device substrate than an upper surface of the lower buffer layer. ### Claim 15 (depends on 11) The display apparatus according to claim 11, further comprising a capacitor upper electrode between the light-blocking pattern and the second semiconductor pattern. ### Claim 16 (depends on 15) The display apparatus according to claim 15, wherein the capacitor upper electrode includes a material different from a gate electrode of the first switching thin film transistor. ### Claim 17 (depends on 11) The display apparatus according to claim 11, wherein the device substrate further includes a hole area in which a substrate hole is disposed, and a separation area in which a separating partition is disposed, wherein the separation area is disposed between the pixel area and the hole area, wherein the separating partition includes at least one under-cut, and wherein a vertical distance of the separating partition is greater than a vertical depth of the bending open hole.