Semiconductor device with multi-threshold gate structure

A semiconductor device, comprising:

• a substrate;
• a gate dielectric layer on the substrate;
• first and second work function layers on first and second portions of the gate dielectric layer, respectively, wherein:
• the first work function layer comprises a first atomic concentration of silicon and in contact with the gate dielectric layer;
• and
• the second work function layer comprises a second atomic concentration of silicon different from the first atomic concentration of silicon and in contact with the gate dielectric layer;
• and
• a third work function layer on the first and second work function layers and in contact with the gate dielectric layer.

A semiconductor device, comprising:

• a substrate;
• a first gate-all-around field effect transistor (GAA FET) on the substrate, comprising:
• a first plurality of nanowires;
• a first gate dielectric layer on the first plurality of nanowires;
• a first work function layer in contact with the first gate dielectric layer and having a first silicon concentration;
• and
• a first silicon capping layer on the first work function layer;
• and
• a second GAA FET on the substrate, comprising:
• a second plurality of nanowires;
• a second gate dielectric layer on the second plurality of nanowires;
• a second work function layer in contact with the second gate dielectric layer and having a second silicon concentration different from the first silicon concentration;
• and
• a second silicon capping layer on the second work function layer and above the first silicon capping layer.