# US 12,604,470 B2 · Memory device and method of manufacturing the same

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- Number: US 12,604,470 B2
- Document ID: US12604470B2
- Status: Granted
- Kind: B2
- Application number: 17/948,627
- Filed: 2022-09-20
- Published: 2023-10-05
- Granted: 2026-04-14
- Earliest claimed: 2022-03-24
- Assignees: SK hynix Inc.
- Applicants: SK hynix Inc.
- Inventors: Won Geun Choi; Mi Seong Park; Jung Shik Jang
- Web page: https://patentgrep.com/patent/US12604470B2

## CPC

- H10B 43/27: the channels comprising vertical portions, e.g. U-shaped channels
- H10B 41/10: characterised by the top-view layout
- H10B 41/27: the channels comprising vertical portions, e.g. U-shaped channels
- H10B 43/10: characterised by the top-view layout
- H10D 30/693: {Vertical IGFETs having charge trapping gate insulators}
- H10D 64/037: {comprising charge-trapping insulators}
- H10W 20/435: {Cross-sectional shapes or dispositions of interconnections}
- H10B: ELECTRONIC MEMORY DEVICES
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A memory device, and a method of manufacturing the same, includes a stack structure and main plugs passing through the stack structure, the main plugs being spaced apart from each other in a first direction. The memory device also includes a separation pattern separating the main plugs in a second direction and a slit pattern separating the stack structure into first and second memory blocks, the slit pattern having an ellipse shape.

## Claims

### Claim 1

A memory device comprising:
a stack structure;
main plugs passing through the stack structure and arranged to be spaced apart from each other in a first direction;
a separation pattern separating the main plugs in a second direction; and
a slit pattern separating the stack structure into first and second memory blocks, the slit pattern having an elliptical shape,
wherein a width of the slit pattern is substantially the same as a width of the separation pattern.

### Claim 2 (depends on 1)

The memory device of claim 1, wherein each of the main plugs includes first and second sub-plugs separated from each other by the separation pattern.

### Claim 3 (depends on 2)

The memory device of claim 2, wherein the first and second sub-plugs have a structure symmetrical to each other across the separation pattern.

### Claim 4 (depends on 3)

The memory device of claim 3, wherein each of the first and second sub-plugs includes a core pillar, a channel layer, a tunnel insulating layer, a charge trap layer, and a blocking layer passing through the stack structure.

### Claim 5 (depends on 1)

The memory device of claim 1, wherein the slit pattern comprises:
a source contact; and
an insulating layer surrounding a side surface of the source contact.

### Claim 6 (depends on 5)

The memory device of claim 5, wherein the insulating layer is formed between gate lines included in the stack structure and the source contact.

### Claim 7 (depends on 1)

The memory device of claim 1, wherein the separation pattern has the ellipse shape.

### Claim 8 (depends on 1)

The memory device of claim 1, wherein a length of the slit pattern is the same as a length of the separation pattern.

### Claim 9 (depends on 1)

The memory device of claim 1, wherein the stack structure includes gate lines stacked to be spaced apart from each other in a vertical direction.

### Claim 10

A memory device comprising:
a stack structure disposed over a source line;
main plugs passing through the stack structure and arranged to be spaced apart from each other in a first direction;
separation patterns separating the main plugs in a second direction; and
a slit separating the stack structure into first and second memory blocks, the slit comprising slit patterns having an elliptical shape,
wherein a width of at least one of the slit patterns is substantially the same as a width of at least one of the separation patterns.

### Claim 11 (depends on 10)

The memory device of claim 10, wherein the slit patterns are arranged to be spaced apart from each other in the first direction.

### Claim 12 (depends on 10)

The memory device of claim 10, wherein the slit patterns are connected to each other through connection structures.

### Claim 13 (depends on 12)

The memory device of claim 12, wherein the connection structures are arranged in a ladder shape between the slit patterns.

### Claim 14 (depends on 12)

The memory device of claim 12, wherein the slit patterns comprise:
source contacts formed on the source line in a direction substantially normal to a plane defined by the first and second directions; and
insulating layers surrounding the source contacts.

### Claim 15 (depends on 14)

The memory device of claim 14, wherein the connection structures comprise:
conductive patterns connecting the source contacts to each other between the slit patterns adjacent to each other; and
insulating patterns surrounding the conductive patterns.