# US 12,604,458 B2 · Apparatus comprising a metal portion in the top portion of capacitor structure, and related methods

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- Number: US 12,604,458 B2
- Document ID: US12604458B2
- Status: Granted
- Kind: B2
- Application number: 17/931,717
- Filed: 2022-09-13
- Published: 2024-03-14
- Granted: 2026-04-14
- Earliest claimed: 2022-09-13
- Assignees: Micron Technology, Inc.
- Applicants: Micron Technology, Inc.
- Inventors: Harutaka Honda; Shogo Omiya; Shoko Norifusa; Hidekazu Nobuto
- Web page: https://patentgrep.com/patent/US12604458B2

## CPC

- H10B 12/31: {having a storage electrode stacked over the transistor}
- H10B 12/033: {the capacitor extending over the transistor}
- H10B 12/09: {with simultaneous manufacture of the peripheral circuit region and memory cells}
- H10B 12/50: {Peripheral circuit region structures}
- H10B: ELECTRONIC MEMORY DEVICES

## Abstract

An apparatus includes: a plurality of capacitors each including first and second conductive portions and a dielectric portion therebetween; a first conductive structure containing the plurality of capacitors therein, and electrically coupled to the second conductive portions of the plurality of capacitors; a second conductive structure on a top surface of the first conductive structure; and a third conductive structure on a top surface of the second conductive structure.

## Claims

### Claim 1

An apparatus comprising:
a plurality of capacitors, each capacitor including first and second conductive portions and a dielectric portion therebetween;
a first conductive structure containing the plurality of capacitors therein, and electrically coupled to the second conductive portions of the plurality of capacitors;
a second conductive structure on a top surface of the first conductive structure, wherein the second conductive structure covers the top surface of the first conductive structure; and
a third conductive structure on a top surface of the second conductive structure.

### Claim 2 (depends on 1)

The apparatus of claim 1, wherein the second conductive structure and the third conductive structure do not cover a side wall of the capacitors.

### Claim 3 (depends on 1)

The apparatus of claim 1, wherein the first conductive structure, the second conductive structure and the third conductive structure comprise different materials, respectively.

### Claim 4 (depends on 1)

The apparatus of claim 1, wherein the first conductive structure comprises impurity-doped polysilicon.

### Claim 5 (depends on 1)

The apparatus of claim 1, wherein the second conductive structure comprises tungsten nitride.

### Claim 6 (depends on 1)

The apparatus of claim 1, wherein the third conductive structure comprises tungsten.

### Claim 7 (depends on 1)

The apparatus of claim 1, wherein the first conductive portion has a pillar shape.

### Claim 8 (depends on 1)

The apparatus of claim 1, wherein the third conductive structure is formed from an initial tungsten portion formed on the surface of the second conductive structure.

### Claim 9

An apparatus comprising:
a memory array including a plurality of memory cells;
a first conductive structure covering the memory array to contain the plurality of memory cells therein, the first conductive structure having a top surface and side surfaces;
a second conductive structure on the top surface of the first conductive structure without covering the side surfaces of the first conductive structure; and
a third conductive structure on a top surface of the second conductive structure without covering the side surfaces of the first conductive structure, wherein the second conductive structure and the third conductive structure comprise different materials.

### Claim 10 (depends on 9)

The apparatus of claim 9, wherein the first conductive structure, the second conductive structure and the third conductive structure are composed of different materials, respectively.

### Claim 11 (depends on 9)

The apparatus of claim 9, wherein the first conductive structure comprises impurity-doped polysilicon.

### Claim 12 (depends on 9)

The apparatus of claim 9, wherein the second conductive structure comprises tungsten nitride and the third conductive structure comprises tungsten.

### Claim 13 (depends on 9)

The apparatus of claim 9, wherein the plurality of memory cells comprise DRAM memory cells.

### Claim 14 (depends on 13)

The apparatus of claim 13, wherein the DRAM memory cells comprise capacitors each having first and second conductive portions and the second conductive portion of each capacitor is electrically coupled to the first conductive structure.

### Claim 15 (depends on 14)

The apparatus of claim 14, wherein the first conductive portion has a pillar shape.

### Claim 16 (depends on 1)

The apparatus of claim 1, wherein the second conductive structure and the third conductive structure do not cover a sidewall of the first conductive structure.

### Claim 17 (depends on 9)

The apparatus of claim 9, wherein the third conductive structure is on the top surface of the second conductive structure without covering side surfaces of the second conductive structure.