Laminate for wiring board
AssigneeNamics Corporation
InventorsNaoki Obata, Makiko Sato
Life of this patent
Estimating the term…
Abstract
The present invention is directed to provide novel laminates for wiring boards. Novel laminates for wiring boards according to the present invention includes an insulating substrate layer and copper wiring, the laminate having a circuit linearity of 1.0 or more and 1.7 or less.
Claims9
A laminate for wiring boards comprising an insulating substrate layer and copper wiring, the laminate having a circuit linearity of 1.0 or more and 1.7 or less,
- wherein a seed layer is present at a boundary between the insulating substrate layer and the copper wiring, and
- wherein the seed layer comprises copper atoms, and
- wherein oxygen is detected in the seed layer in elemental mapping using an energy-dispersive X-ray spectroscope (EDS).
A laminate for wiring boards comprising an insulating substrate layer and copper wiring, the laminate having a circuit linearity of 1.0 or more and 1.7 or less,
- wherein a seed layer is present at a boundary between the insulating substrate layer and the copper wiring,
- wherein the seed layer comprises copper atoms, and
- wherein crystal grains of copper with a maximum width of 100 nm or larger account for 1% or less relative to the total volume in the seed layer.
A laminate for wiring boards comprising an insulating substrate layer and copper wiring, the laminate having a circuit linearity of 1.0 or more and 1.7 or less,
- wherein a seed layer is present at a boundary between the insulating substrate layer and the copper wiring,
- wherein the seed layer comprises copper atoms, and
- wherein a percentage of crystal grains with a maximum width of 500 nm or larger is at least 0% and less than 50% when a size distribution of the crystal grains is measured using electron backscatter diffraction (EBSD) in the seed layer.
A laminate for wiring boards comprising an insulating substrate layer and copper wiring, the laminate having a circuit linearity of 1.0 or more and 1.7 or less,
- wherein a seed layer is present at a boundary between the insulating substrate layer and the copper wiring,
- wherein the seed layer comprises copper atoms, and
- wherein crystal grains with a maximum width of 500 nm or larger is are not detected when a size distribution of the crystal grains is measured using electron backscatter diffraction (EBSD) in the seed layer.
A laminate for wiring boards comprising an insulating substrate layer and copper wiring, the laminate having a circuit linearity of 1.0 or more and 1.7 or less,
- wherein a seed layer is present at a boundary between the insulating substrate layer and the copper wiring, and
- wherein a percentage of crystal grains with a maximum width of 500 nm or larger is at least 0% and less than 50% when a size distribution of the crystal grains is measured using electron backscatter diffraction (EBSD) in the seed layer.
Dependencies are inferred from the claim text.