# US 12,604,020 B2 · Video decoding method and decoder device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,604,020 B2 - Document ID: US12604020B2 - Status: Granted - Kind: B2 - Application number: 18/815,980 - Filed: 2024-08-27 - Published: 2025-04-17 - Granted: 2026-04-14 - Earliest claimed: 2023-10-16 - Assignees: Sigmastar Technology Ltd. - Applicants: SigmaStar Technology Ltd. - Inventors: Tao Jin - Web page: https://patentgrep.com/patent/US12604020B2 ## CPC - H04N 19/423: characterised by memory arrangements (H04N19/433 takes precedence) - H04N 19/172: the region being a picture, frame or field - H04N 19/44: Decoders specially adapted therefor, e.g. video decoders which are asymmetric with respect to the encoder - H04N 19/463: by compressing encoding parameters before transmission - H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION ## Abstract A video decoding method is applied to a decoder device to decode an encoded stream stored in memory. The decoder device includes a video decoder, a memory controller and a processor. The video decoding method includes: setting, by the memory controller, a decoded picture buffer in the memory according to a maximum number X of reference frames in the encoded stream, wherein the decoded picture buffer includes X+1 picture buffer areas, each picture buffer area is configured to store a decoded image, and X is a positive integer; determining an idle picture buffer area in the decoded picture according to status information of the decoded picture buffer; and controlling the video decoder to decode a current frame in the encoded stream to obtain a decoded image of the current frame and storing the decoded image of the current frame to the idle picture buffer area. ## Claims ### Claim 1 A video decoding method, applied to a decoder device to decode an encoded stream stored in a memory, the decoder device comprising a video decoder, a memory controller and a processor; the video decoding method comprising: setting, by the memory controller, a decoded picture buffer in the memory according to a maximum number X of reference frames of the encoded stream, wherein the decoded picture buffer comprises (X+1) picture buffer areas, and each of the picture buffer areas is used to store a decoded image, where X is a positive integer; determining, according to status information of the decoded picture buffer, a picture buffer area in the decoded picture buffer that is idle; controlling the video decoder to decode a current frame in the encoded stream so as to obtain a decoded image of the current frame; storing the decoded image of the current frame to the picture buffer area that is idle; and when it is determined, according to the status information of the picture buffer area, that there is no idle picture buffer area in the decoded picture buffer, adding an added picture buffer area to expand the decoded picture buffer, wherein the added picture buffer area is used to store the decoded image of the current frame. ### Claim 2 (depends on 1) The video decoding method according to claim 1, wherein the status information of the decoded picture buffer comprises tag information of each of the picture buffer areas, the tag information comprises a picture order count tag and a reference frame tag of the decoded image stored in the decoded picture buffer, and the video decoding method further comprises: obtaining reference frame control information from the encoded stream; and updating the reference frame tag of the decoded image stored in the decoded picture buffer according to the reference frame control information, so as to update the tag information of each of the picture buffer areas in the decoded picture buffer. ### Claim 3 (depends on 2) The video decoding method according to claim 2, wherein the determining, according to status information of the decoded picture buffer, an idle picture buffer area in the decoded picture buffer comprises: when the tag information of one of the picture buffer areas is empty, determining that the decoded picture buffer comprises the idle picture buffer area. ### Claim 4 (depends on 2) The video decoding method according to claim 2, further comprising: correspondingly generating at least one of a picture order count tag and a reference frame tag according to a picture order count tag of the decoded image of the current frame and information of the decoded image of the current frame to be used as a reference frame, and accordingly updating tag information of the picture buffer area storing the decoded image of the current frame. ### Claim 5 (depends on 4) The video decoding method according to claim 4, further comprising: displaying the decoded image stored in the decoded picture buffer, and accordingly updating the picture order count tag in the tag information of the picture buffer area storing the decoded image. ### Claim 6 (depends on 1) The video decoding method according to claim 1, further comprising: reading, according to a maximum number Y of reorder delay frames of the encoded stream and a picture order count tag included in tag information of each of the picture buffer areas, the decoded image to be currently displayed from the decoded picture buffer; and clearing a picture order count of the picture buffer area storing the decoded image to be currently displayed, where Y is a positive integer. ### Claim 7 (depends on 1) The video decoding method according to claim 1, wherein the setting of the decoded picture buffer according to the maximum number X of reference frames of the encoded stream comprises: setting the decoded picture buffer according to the maximum number X of reference frames and a maximum number Y of reorder delay frames of the encoded stream, wherein a number of picture buffer areas included in the decoded picture buffer is greater than or equal to (X+1) and is smaller than or equal to (X+Y), and X>=Y>1, where Y is a positive integer. ### Claim 8 A decoder device, applied to decode an encoded stream stored in a memory, the decoder device comprising a video decoder, a memory controller and a processor, wherein the processor is configured to: set, by the memory controller, a decoded picture buffer in the memory according to a maximum number X of reference frame of the encoded stream, wherein the decoded picture buffer comprises (X+1) picture buffer areas, and each of the picture buffer areas is used to store a decoded image, where X is a positive integer; determine, according to status information of the decoded picture buffer, a picture buffer area in the decoded picture buffer that is idle; and control the video decoder to decode a current frame in the encoded stream so as to obtain a decoded image of the current frame, and store the decoded image of the current frame to the picture buffer area that is idle, wherein when it is determined according to the status information of the picture buffer area that there is no idle picture buffer area in the decoded picture buffer, the processor adds an added picture buffer area to expand the decoded picture buffer, wherein the added picture buffer area is used to store the decoded image of the current frame. ### Claim 9 (depends on 8) The decoder device according to claim 8, wherein the status information of the decoded picture buffer comprises tag information of each of the picture buffer areas, the tag information comprises a picture order count tag and a reference frame tag of the decoded image stored in the decoded picture buffer, and the processor is further configured to: obtain reference frame control information from the encoded stream; and update the reference frame tag of the decoded image stored in the decoded picture buffer according to the reference frame control information, so as to update the tag information of each of the picture buffer areas in the decoded picture buffer. ### Claim 10 (depends on 9) The decoder device according to claim 9, wherein when the tag information of one of the picture buffer areas is empty, the processor determines that the decoded picture buffer comprises the picture buffer area that is idle. ### Claim 11 (depends on 9) The decoder device according to claim 9, wherein the processor generates at least one of a picture order count tag and a reference frame tag according to a picture order count tag of the decoded image of the current frame and information of the decoded image of the current frame to be used as a reference frame, and accordingly updating tag information of the picture buffer area storing the decoded image of the current frame. ### Claim 12 (depends on 11) The decoder device according to claim 11, wherein the processor is configured to: display the decoded images stored in the decoded picture buffer, and accordingly update the picture order count tag in the tag information of the picture buffer area storing the decoded image. ### Claim 13 (depends on 8) The decoder device according to claim 8, wherein the processor is configured to: read, according to a maximum number Y of reorder delay frames of the encoded stream and a picture order count tag included in tag information of each of the picture buffer areas, the decoded image to be currently displayed from the decoded picture buffer; and clear a picture order count of the picture buffer area storing the decoded image to be currently displayed, where Y is a positive integer. ### Claim 14 (depends on 8) The decoder device according to claim 8, wherein the processor is configured to: set the decoded picture buffer according to the maximum number X of reference frames and a maximum number Y of reorder delay frames of the encoded stream, wherein a number of picture buffer areas included in the decoded picture buffer is greater than or equal to (X+1) and is smaller than or equal to (X+Y), and X>=Y>1, where Y is a positive integer.