Signal processing method and device for a memory system interface circuit

A signal processing device for a memory system interface circuit, wherein the memory system interface circuit comprises at least one signal pin each being configured to receive a transmission signal via an individual signal link and to generate a received signal at a receiving node of the signal link, and wherein the signal processing device comprises:

• a pre-processing module configured for pre-processing the received signal to obtain an input signal;
• a decision feedback equalizer (DFE) comprising an output path coupled with an output sampler and a feedback path coupled with a finite impulse response (FIR) filter;
• the DFE being configured for removing a weighted feedback signal from the input signal to obtain an output signal, and the output sampler being configured for deciding on the output signal based on a predetermined base signal to generate a digital output signal;
• wherein the weighted feedback signal is obtained by weighting on a scale of a filter coefficient matrix of the FIR filter the digital output signal;
• an error sampler configured for comparing the output signal with a reference signal to generate an error signal;
• and
• an adaptive processing module configured for determining a set of optimal filter coefficients of the filter coefficient matrix of the FIR filter and the reference signal according to correlation between the digital output signal and the error signal, to minimize inter-symbol interference (ISI) of the received signal introduced by transmission characteristics of the signal link, wherein the adaptive processing module is further configured to determine a set of optimal filter coefficients of the filter coefficient matrix of the FIR filter and the reference signal according to correlation between the digital output signal and the error signal through:
• determining whether to update the reference signal according to signs of the digital output signal and the error signal at a current time moment;
• and
• updating the reference signal at a predetermined reference step according to an indication to update the reference signal.