# US 12,603,660 B2 · Mixed-signal processing integrated in hybrid voltage-time analog to digital converter > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,603,660 B2 - Document ID: US12603660B2 - Status: Granted - Kind: B2 - Application number: 17/955,186 - Filed: 2022-09-28 - Published: 2024-03-28 - Granted: 2026-04-14 - Earliest claimed: 2022-09-28 - Assignees: Intel Corporation - Applicants: Intel Corporation - Inventors: Amy Whitcombe; Brent R. Carlton; Sundar Krishnamurthy; Deepak Dasalukunte - Web page: https://patentgrep.com/patent/US12603660B2 ## CPC - H03M 1/38: sequentially only, e.g. successive approximation type (converting more than one bit per step H03M1/14) - H03M 1/121: {Interleaved, i.e. using multiple converters or converter parts for one channel} - H03M 1/1245: {Details of sampling arrangements or methods} - H03M 1/10: Calibration or testing - H03M 1/50: with intermediate conversion to time interval (H03M1/64 takes precedence) - H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C) ## Abstract A converter can include a number of time-to-voltage converters (TVCs) each receiving an input time-domain signal. The input time-domain signal can represent a different sample than input time-domain signals of the other TVCs. The converter can also include a capacitive element coupled to outputs of the TVCs to receive a combined output signal of the TVCs. The capacitive element can provide an input capacitance of an analog-to-digital converter (ADC). Other methods and apparatuses are described. ## Claims ### Claim 1 A converter comprising: a plurality of time-to-voltage converters (TVCs), a TVC of the plurality configured to receive an input time-domain signal, the input time-domain signal representing a different sample than input time-domain signals of other TVCs of the plurality of TVCs; and a capacitive element coupled to outputs of the plurality of TVCs to receive a combined output signal of the plurality of TVCs, the capacitive element providing an input capacitance of an analog-to-digital converter (ADC). ### Claim 2 (depends on 1) The converter of claim 1, wherein the converter provides input to a plurality of ADCs. ### Claim 3 (depends on 1) The converter of claim 1, wherein the ADC comprises a successive approximation (SAR) circuit configured to generate a digital-domain version of the combined output signal. ### Claim 4 (depends on 1) The converter of claim 1, wherein the plurality of TVCs is configured to generate the combined output signal by providing weighting factors to a plurality of input time-domain signals. ### Claim 5 (depends on 4) The converter of claim 4, wherein the weighting factors comprise weighted current values for the plurality of TVCs, and wherein the weighted current values may be controlled via a digital signal processor (DSP) and generate an output voltage proportional to capacitive values associated with the capacitive element. ### Claim 6 (depends on 1) The converter of claim 1, wherein a number of TVCs is greater than or equal to a number of the input time-domain signals. ### Claim 7 (depends on 2) The converter of claim 2, wherein a number of the plurality of ADCs is equal to a number of the input time-domain signals. ### Claim 8 (depends on 1) The converter of claim 1, wherein the plurality of TVCs are differential TVCs. ### Claim 9 (depends on 1) The converter of claim 1, wherein the time-domain signals are generated by providing a voltage-domain signal to a single voltage-to-time converter (VTC) and outputting a result of the VTC to a digital de-multiplexer to generate the time-domain signals. ### Claim 10 (depends on 1) The converter of claim 1, wherein the time-domain signals are generated by providing a voltage-domain signal to a plurality of time-interleaved voltage-to-time converters (VTCs) to generate the time-domain signals, and wherein the plurality of time-interleaved VTCs are driven by phase-shifted clocks. ### Claim 11 (depends on 10) The converter of claim 10, wherein the time-domain signals are sampled simultaneously from different voltage-domain signals. ### Claim 12 (depends on 2) The converter of claim 2, wherein a number of the plurality of ADCs is greater than a number of the input time-domain signals, and wherein the converter provides upsampling. ### Claim 13 (depends on 2) The converter of claim 2, wherein a number of the plurality of ADCs is less than a number of the input time-domain signals, and wherein the converter provides downsampling. ### Claim 14 A device comprising: digital processing circuitry; and a converter comprising: a plurality of time-to-voltage converters (TVCs), a TVC of the plurality configured to receive an input time-domain signal, the input time-domain signal representing a different sample than input time-domain signals of other TVCs of the plurality of TVCs; and a capacitive element coupled to outputs of the plurality of TVCs to receive a combined output signal of the plurality of TVCs, the capacitive element providing an input capacitance of an analog-to-digital converter (ADC). ### Claim 15 (depends on 14) The device of claim 14, wherein the ADC comprises a successive approximation (SAR) circuit configured to generate a digital-domain version of the combined output signal. ### Claim 16 (depends on 14) The device of claim 14, wherein the plurality of TVCs is configured to generate the combined output signal by providing weighting factors to a plurality of input time-domain signals. ### Claim 17 (depends on 14) The device of claim 14, wherein the converter provides input to a plurality of ADCs, and wherein a number of the plurality of ADCs is greater than a number of the input time-domain signals, and wherein the converter provides upsampling. ### Claim 18 (depends on 14) The device of claim 14, wherein the converter provides input to a plurality of ADCs, and wherein a number of the plurality of ADCs less than a number of the input time-domain signals, and wherein the converter provides downsampling. ### Claim 19 A method for analog-to-digital conversion, the method comprising: providing a calibration input to converter circuitry; enabling one of a plurality of time-to-voltage converters (TVCs), the plurality providing input to an analog-to-digital converter (ADC); measuring a response of an ADC of an array of ADCs to the one of the plurality of TVCs; and decoding the response of the ADC and providing a calibrated signal based on measured responses of the ADC to the plurality of TVCs. ### Claim 20 (depends on 19) The method of claim 19, further comprising: performing successive approximation to generate a digital-domain version of a combined output signal. ### Claim 21 (depends on 19) The method of claim 19, wherein providing a combined output signal further comprises providing weighting factors to a plurality of input time-domain signals.